Module enet
Source - ATCOR
- Timer Correction Register
- ATCR
- Adjustable Timer Control Register
- ATINC
- Time-Stamping Clock Period Register
- ATOFF
- Timer Offset Register
- ATPER
- Timer Period Register
- ATSTMP
- Timestamp of Last Transmitted Frame
- ATVR
- Timer Value Register
- ECR
- Ethernet Control Register
- EIMR
- Interrupt Mask Register
- EIR
- Interrupt Event Register
- FTRL
- Frame Truncation Length
- GALR
- Descriptor Group Lower Address Register
- GAUR
- Descriptor Group Upper Address Register
- IALR
- Descriptor Individual Lower Address Register
- IAUR
- Descriptor Individual Upper Address Register
- IEEE_R_ALIGN
- Frames Received with Alignment Error Statistic Register
- IEEE_R_CRC
- Frames Received with CRC Error Statistic Register
- IEEE_R_DROP
- Frames not Counted Correctly Statistic Register
- IEEE_R_FDXFC
- Flow Control Pause Frames Received Statistic Register
- IEEE_R_FRAME_OK
- Frames Received OK Statistic Register
- IEEE_R_MACERR
- Receive FIFO Overflow Count Statistic Register
- IEEE_R_OCTETS_OK
- Octet Count for Frames Received without Error Statistic Register
- IEEE_T_1COL
- Frames Transmitted with Single Collision Statistic Register
- IEEE_T_CSERR
- Frames Transmitted with Carrier Sense Error Statistic Register
- IEEE_T_DEF
- Frames Transmitted after Deferral Delay Statistic Register
- IEEE_T_EXCOL
- Frames Transmitted with Excessive Collisions Statistic Register
- IEEE_T_FDXFC
- Flow Control Pause Frames Transmitted Statistic Register
- IEEE_T_FRAME_OK
- Frames Transmitted OK Statistic Register
- IEEE_T_LCOL
- Frames Transmitted with Late Collision Statistic Register
- IEEE_T_MACERR
- Frames Transmitted with Tx FIFO Underrun Statistic Register
- IEEE_T_MCOL
- Frames Transmitted with Multiple Collisions Statistic Register
- IEEE_T_OCTETS_OK
- Octet Count for Frames Transmitted w/o Error Statistic Register
- IEEE_T_SQE
- Reserved Statistic Register
- MIBC
- MIB Control Register
- MMFR
- MII Management Frame Register
- MRBR
- Maximum Receive Buffer Size Register
- MSCR
- MII Speed Control Register
- OPD
- Opcode/Pause Duration Register
- PALR
- Physical Address Lower Register
- PAUR
- Physical Address Upper Register
- RACC
- Receive Accelerator Function Configuration
- RAEM
- Receive FIFO Almost Empty Threshold
- RAFL
- Receive FIFO Almost Full Threshold
- RCR
- Receive Control Register
- RDAR
- Receive Descriptor Active Register
- RDSR
- Receive Descriptor Ring Start Register
- RMON_R_BC_PKT
- Rx Broadcast Packets Statistic Register
- RMON_R_CRC_ALIGN
- Rx Packets with CRC/Align Error Statistic Register
- RMON_R_FRAG
- Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register
- RMON_R_JAB
- Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register
- RMON_R_MC_PKT
- Rx Multicast Packets Statistic Register
- RMON_R_OCTETS
- Rx Octets Statistic Register
- RMON_R_OVERSIZE
- Rx Packets Greater Than MAX_FL and Good CRC Statistic Register
- RMON_R_P64
- Rx 64-Byte Packets Statistic Register
- RMON_R_P65TO127
- Rx 65- to 127-Byte Packets Statistic Register
- RMON_R_P128TO255
- Rx 128- to 255-Byte Packets Statistic Register
- RMON_R_P256TO511
- Rx 256- to 511-Byte Packets Statistic Register
- RMON_R_P512TO1023
- Rx 512- to 1023-Byte Packets Statistic Register
- RMON_R_P1024TO2047
- Rx 1024- to 2047-Byte Packets Statistic Register
- RMON_R_PACKETS
- Rx Packet Count Statistic Register
- RMON_R_P_GTE2048
- Rx Packets Greater than 2048 Bytes Statistic Register
- RMON_R_UNDERSIZE
- Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register
- RMON_T_BC_PKT
- Tx Broadcast Packets Statistic Register
- RMON_T_COL
- Tx Collision Count Statistic Register
- RMON_T_CRC_ALIGN
- Tx Packets with CRC/Align Error Statistic Register
- RMON_T_FRAG
- Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register
- RMON_T_JAB
- Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register
- RMON_T_MC_PKT
- Tx Multicast Packets Statistic Register
- RMON_T_OCTETS
- Tx Octets Statistic Register
- RMON_T_OVERSIZE
- Tx Packets GT MAX_FL bytes and Good CRC Statistic Register
- RMON_T_P64
- Tx 64-Byte Packets Statistic Register
- RMON_T_P65TO127
- Tx 65- to 127-byte Packets Statistic Register
- RMON_T_P128TO255
- Tx 128- to 255-byte Packets Statistic Register
- RMON_T_P256TO511
- Tx 256- to 511-byte Packets Statistic Register
- RMON_T_P512TO1023
- Tx 512- to 1023-byte Packets Statistic Register
- RMON_T_P1024TO2047
- Tx 1024- to 2047-byte Packets Statistic Register
- RMON_T_PACKETS
- Tx Packet Count Statistic Register
- RMON_T_P_GTE2048
- Tx Packets Greater Than 2048 Bytes Statistic Register
- RMON_T_UNDERSIZE
- Tx Packets Less Than Bytes and Good CRC Statistic Register
- RSEM
- Receive FIFO Section Empty Threshold
- RSFL
- Receive FIFO Section Full Threshold
- RXIC
- Receive Interrupt Coalescing Register
- TACC
- Transmit Accelerator Function Configuration
- TAEM
- Transmit FIFO Almost Empty Threshold
- TAFL
- Transmit FIFO Almost Full Threshold
- TCCR0
- Timer Compare Capture Register
- TCCR1
- Timer Compare Capture Register
- TCCR2
- Timer Compare Capture Register
- TCCR3
- Timer Compare Capture Register
- TCR
- Transmit Control Register
- TCSR0
- Timer Control Status Register
- TCSR1
- Timer Control Status Register
- TCSR2
- Timer Control Status Register
- TCSR3
- Timer Control Status Register
- TDAR
- Transmit Descriptor Active Register
- TDSR
- Transmit Buffer Descriptor Ring Start Register
- TFWR
- Transmit FIFO Watermark Register
- TGSR
- Timer Global Status Register
- TIPG
- Transmit Inter-Packet Gap
- TSEM
- Transmit FIFO Section Empty Threshold
- TXIC
- Transmit Interrupt Coalescing Register
- RegisterBlock
- Ethernet MAC-NET Core
- ENET1
- Ethernet MAC-NET Core
- ENET2
- Ethernet MAC-NET Core
- number
- Returns the instance number
N for a peripheral instance.
- ENET1
- ENET2
- Instance