imxrt_ral/blocks/imxrt1011/
pgc.rs1#[doc = "PGC"]
2#[repr(C)]
3pub struct RegisterBlock {
4 _reserved0: [u8; 0x0220],
5 #[doc = "PGC Mega Control Register"]
6 pub MEGA_CTRL: crate::RWRegister<u32>,
7 #[doc = "PGC Mega Power Up Sequence Control Register"]
8 pub MEGA_PUPSCR: crate::RWRegister<u32>,
9 #[doc = "PGC Mega Pull Down Sequence Control Register"]
10 pub MEGA_PDNSCR: crate::RWRegister<u32>,
11 #[doc = "PGC Mega Power Gating Controller Status Register"]
12 pub MEGA_SR: crate::RWRegister<u32>,
13 _reserved1: [u8; 0x70],
14 #[doc = "PGC CPU Control Register"]
15 pub CPU_CTRL: crate::RWRegister<u32>,
16 #[doc = "PGC CPU Power Up Sequence Control Register"]
17 pub CPU_PUPSCR: crate::RWRegister<u32>,
18 #[doc = "PGC CPU Pull Down Sequence Control Register"]
19 pub CPU_PDNSCR: crate::RWRegister<u32>,
20 #[doc = "PGC CPU Power Gating Controller Status Register"]
21 pub CPU_SR: crate::RWRegister<u32>,
22}
23#[doc = "PGC Mega Control Register"]
24pub mod MEGA_CTRL {
25 #[doc = "Power Control PCR must not change from power-down request (pdn_req) assertion until the target subsystem is completely powered up"]
26 pub mod PCR {
27 pub const offset: u32 = 0;
28 pub const mask: u32 = 0x01 << offset;
29 pub mod R {}
30 pub mod W {}
31 pub mod RW {
32 #[doc = "Do not switch off power even if pdn_req is asserted."]
33 pub const PCR_0: u32 = 0;
34 #[doc = "Switch off power when pdn_req is asserted."]
35 pub const PCR_1: u32 = 0x01;
36 }
37 }
38}
39#[doc = "PGC Mega Power Up Sequence Control Register"]
40pub mod MEGA_PUPSCR {
41 #[doc = "After a power-up request (pup_req assertion), the PGC waits a number of IPG clocks equal to the value of SW before asserting power toggle on/off signal (switch_b)"]
42 pub mod SW {
43 pub const offset: u32 = 0;
44 pub const mask: u32 = 0x3f << offset;
45 pub mod R {}
46 pub mod W {}
47 pub mod RW {}
48 }
49 #[doc = "After asserting power toggle on/off signal (switch_b), the PGC waits a number of IPG clocks equal to the value of SW2ISO before negating isolation"]
50 pub mod SW2ISO {
51 pub const offset: u32 = 8;
52 pub const mask: u32 = 0x3f << offset;
53 pub mod R {}
54 pub mod W {}
55 pub mod RW {}
56 }
57}
58#[doc = "PGC Mega Pull Down Sequence Control Register"]
59pub mod MEGA_PDNSCR {
60 #[doc = "After a power-down request (pdn_req assertion), the PGC waits a number of IPG clocks equal to the value of ISO before asserting isolation"]
61 pub mod ISO {
62 pub const offset: u32 = 0;
63 pub const mask: u32 = 0x3f << offset;
64 pub mod R {}
65 pub mod W {}
66 pub mod RW {}
67 }
68 #[doc = "After asserting isolation, the PGC waits a number of IPG clocks equal to the value of ISO2SW before negating power toggle on/off signal (switch_b)"]
69 pub mod ISO2SW {
70 pub const offset: u32 = 8;
71 pub const mask: u32 = 0x3f << offset;
72 pub mod R {}
73 pub mod W {}
74 pub mod RW {}
75 }
76}
77#[doc = "PGC Mega Power Gating Controller Status Register"]
78pub mod MEGA_SR {
79 #[doc = "Power status"]
80 pub mod PSR {
81 pub const offset: u32 = 0;
82 pub const mask: u32 = 0x01 << offset;
83 pub mod R {}
84 pub mod W {}
85 pub mod RW {
86 #[doc = "The target subsystem was not powered down for the previous power-down request."]
87 pub const PSR_0: u32 = 0;
88 #[doc = "The target subsystem was powered down for the previous power-down request."]
89 pub const PSR_1: u32 = 0x01;
90 }
91 }
92}
93#[doc = "PGC CPU Control Register"]
94pub mod CPU_CTRL {
95 #[doc = "Power Control PCR must not change from power-down request (pdn_req) assertion until the target subsystem is completely powered up"]
96 pub mod PCR {
97 pub const offset: u32 = 0;
98 pub const mask: u32 = 0x01 << offset;
99 pub mod R {}
100 pub mod W {}
101 pub mod RW {
102 #[doc = "Do not switch off power even if pdn_req is asserted."]
103 pub const PCR_0: u32 = 0;
104 #[doc = "Switch off power when pdn_req is asserted."]
105 pub const PCR_1: u32 = 0x01;
106 }
107 }
108}
109#[doc = "PGC CPU Power Up Sequence Control Register"]
110pub mod CPU_PUPSCR {
111 #[doc = "There are two different silicon revisions: 1"]
112 pub mod SW {
113 pub const offset: u32 = 0;
114 pub const mask: u32 = 0x3f << offset;
115 pub mod R {}
116 pub mod W {}
117 pub mod RW {}
118 }
119 #[doc = "There are two different silicon revisions: 1"]
120 pub mod SW2ISO {
121 pub const offset: u32 = 8;
122 pub const mask: u32 = 0x3f << offset;
123 pub mod R {}
124 pub mod W {}
125 pub mod RW {}
126 }
127}
128#[doc = "PGC CPU Pull Down Sequence Control Register"]
129pub mod CPU_PDNSCR {
130 #[doc = "After a power-down request (pdn_req assertion), the PGC waits a number of 32k clocks equal to the value of ISO before asserting isolation"]
131 pub mod ISO {
132 pub const offset: u32 = 0;
133 pub const mask: u32 = 0x3f << offset;
134 pub mod R {}
135 pub mod W {}
136 pub mod RW {}
137 }
138 #[doc = "After asserting isolation, the PGC waits a number of 32k clocks equal to the value of ISO2SW before negating"]
139 pub mod ISO2SW {
140 pub const offset: u32 = 8;
141 pub const mask: u32 = 0x3f << offset;
142 pub mod R {}
143 pub mod W {}
144 pub mod RW {}
145 }
146}
147#[doc = "PGC CPU Power Gating Controller Status Register"]
148pub mod CPU_SR {
149 #[doc = "Power status"]
150 pub mod PSR {
151 pub const offset: u32 = 0;
152 pub const mask: u32 = 0x01 << offset;
153 pub mod R {}
154 pub mod W {}
155 pub mod RW {
156 #[doc = "The target subsystem was not powered down for the previous power-down request."]
157 pub const PSR_0: u32 = 0;
158 #[doc = "The target subsystem was powered down for the previous power-down request."]
159 pub const PSR_1: u32 = 0x01;
160 }
161 }
162}