imxrt_ral/blocks/imxrt1051/
dcdc.rs1#[doc = "DCDC"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "DCDC Register 0"]
5 pub REG0: crate::RWRegister<u32>,
6 #[doc = "DCDC Register 1"]
7 pub REG1: crate::RWRegister<u32>,
8 #[doc = "DCDC Register 2"]
9 pub REG2: crate::RWRegister<u32>,
10 #[doc = "DCDC Register 3"]
11 pub REG3: crate::RWRegister<u32>,
12}
13#[doc = "DCDC Register 0"]
14pub mod REG0 {
15 #[doc = "power down the zero cross detection function for discontinuous conductor mode"]
16 pub mod PWD_ZCD {
17 pub const offset: u32 = 0;
18 pub const mask: u32 = 0x01 << offset;
19 pub mod R {}
20 pub mod W {}
21 pub mod RW {}
22 }
23 #[doc = "Disable automatic clock switch from internal osc to xtal clock."]
24 pub mod DISABLE_AUTO_CLK_SWITCH {
25 pub const offset: u32 = 1;
26 pub const mask: u32 = 0x01 << offset;
27 pub mod R {}
28 pub mod W {}
29 pub mod RW {}
30 }
31 #[doc = "select 24 MHz Crystal clock for DCDC, when dcdc_disable_auto_clk_switch is set."]
32 pub mod SEL_CLK {
33 pub const offset: u32 = 2;
34 pub const mask: u32 = 0x01 << offset;
35 pub mod R {}
36 pub mod W {}
37 pub mod RW {}
38 }
39 #[doc = "Power down internal osc. Only set this bit, when 24 MHz crystal osc is available"]
40 pub mod PWD_OSC_INT {
41 pub const offset: u32 = 3;
42 pub const mask: u32 = 0x01 << offset;
43 pub mod R {}
44 pub mod W {}
45 pub mod RW {}
46 }
47 #[doc = "The power down signal of the current detector."]
48 pub mod PWD_CUR_SNS_CMP {
49 pub const offset: u32 = 4;
50 pub const mask: u32 = 0x01 << offset;
51 pub mod R {}
52 pub mod W {}
53 pub mod RW {}
54 }
55 #[doc = "Set the threshold of current detector, if the peak current of the inductor exceeds the threshold, the current detector will assert"]
56 pub mod CUR_SNS_THRSH {
57 pub const offset: u32 = 5;
58 pub const mask: u32 = 0x07 << offset;
59 pub mod R {}
60 pub mod W {}
61 pub mod RW {}
62 }
63 #[doc = "power down overcurrent detection comparator"]
64 pub mod PWD_OVERCUR_DET {
65 pub const offset: u32 = 8;
66 pub const mask: u32 = 0x01 << offset;
67 pub mod R {}
68 pub mod W {}
69 pub mod RW {}
70 }
71 #[doc = "The threshold of over current detection in run mode and power save mode: run mode power save mode 0x0 1 A 0"]
72 pub mod OVERCUR_TRIG_ADJ {
73 pub const offset: u32 = 9;
74 pub const mask: u32 = 0x03 << offset;
75 pub mod R {}
76 pub mod W {}
77 pub mod RW {}
78 }
79 #[doc = "set to \"1\" to power down the low voltage detection comparator"]
80 pub mod PWD_CMP_BATT_DET {
81 pub const offset: u32 = 11;
82 pub const mask: u32 = 0x01 << offset;
83 pub mod R {}
84 pub mod W {}
85 pub mod RW {}
86 }
87 #[doc = "adjust value to poslimit_buck register"]
88 pub mod ADJ_POSLIMIT_BUCK {
89 pub const offset: u32 = 12;
90 pub const mask: u32 = 0x0f << offset;
91 pub mod R {}
92 pub mod W {}
93 pub mod RW {}
94 }
95 #[doc = "enable the overload detection in power save mode, if current is larger than the overloading threshold (typical value is 50 mA), DCDC will switch to the run mode automatically"]
96 pub mod EN_LP_OVERLOAD_SNS {
97 pub const offset: u32 = 16;
98 pub const mask: u32 = 0x01 << offset;
99 pub mod R {}
100 pub mod W {}
101 pub mod RW {}
102 }
103 #[doc = "power down overvoltage detection comparator"]
104 pub mod PWD_HIGH_VOLT_DET {
105 pub const offset: u32 = 17;
106 pub const mask: u32 = 0x01 << offset;
107 pub mod R {}
108 pub mod W {}
109 pub mod RW {}
110 }
111 #[doc = "the threshold of the counting number of charging times during the period that lp_overload_freq_sel sets in power save mode"]
112 pub mod LP_OVERLOAD_THRSH {
113 pub const offset: u32 = 18;
114 pub const mask: u32 = 0x03 << offset;
115 pub mod R {}
116 pub mod W {}
117 pub mod RW {}
118 }
119 #[doc = "the period of counting the charging times in power save mode 0: eight 32k cycle 1: sixteen 32k cycle"]
120 pub mod LP_OVERLOAD_FREQ_SEL {
121 pub const offset: u32 = 20;
122 pub const mask: u32 = 0x01 << offset;
123 pub mod R {}
124 pub mod W {}
125 pub mod RW {}
126 }
127 #[doc = "Adjust hysteretic value in low power from 12.5mV to 25mV"]
128 pub mod LP_HIGH_HYS {
129 pub const offset: u32 = 21;
130 pub const mask: u32 = 0x01 << offset;
131 pub mod R {}
132 pub mod W {}
133 pub mod RW {}
134 }
135 #[doc = "power down output range comparator"]
136 pub mod PWD_CMP_OFFSET {
137 pub const offset: u32 = 26;
138 pub const mask: u32 = 0x01 << offset;
139 pub mod R {}
140 pub mod W {}
141 pub mod RW {}
142 }
143 #[doc = "1'b1: Disable xtalok detection circuit 1'b0: Enable xtalok detection circuit"]
144 pub mod XTALOK_DISABLE {
145 pub const offset: u32 = 27;
146 pub const mask: u32 = 0x01 << offset;
147 pub mod R {}
148 pub mod W {}
149 pub mod RW {}
150 }
151 #[doc = "reset current alert signal"]
152 pub mod CURRENT_ALERT_RESET {
153 pub const offset: u32 = 28;
154 pub const mask: u32 = 0x01 << offset;
155 pub mod R {}
156 pub mod W {}
157 pub mod RW {}
158 }
159 #[doc = "set to 1 to switch internal ring osc to xtal 24M"]
160 pub mod XTAL_24M_OK {
161 pub const offset: u32 = 29;
162 pub const mask: u32 = 0x01 << offset;
163 pub mod R {}
164 pub mod W {}
165 pub mod RW {}
166 }
167 #[doc = "Status register to indicate DCDC status. 1'b1: DCDC already settled 1'b0: DCDC is settling"]
168 pub mod STS_DC_OK {
169 pub const offset: u32 = 31;
170 pub const mask: u32 = 0x01 << offset;
171 pub mod R {}
172 pub mod W {}
173 pub mod RW {}
174 }
175}
176#[doc = "DCDC Register 1"]
177pub mod REG1 {
178 #[doc = "select the feedback point of the internal regulator"]
179 pub mod REG_FBK_SEL {
180 pub const offset: u32 = 7;
181 pub const mask: u32 = 0x03 << offset;
182 pub mod R {}
183 pub mod W {}
184 pub mod RW {}
185 }
186 #[doc = "control the load resistor of the internal regulator of DCDC, the load resistor is connected as default \"1\", and need set to \"0\" to disconnect the load resistor"]
187 pub mod REG_RLOAD_SW {
188 pub const offset: u32 = 9;
189 pub const mask: u32 = 0x01 << offset;
190 pub mod R {}
191 pub mod W {}
192 pub mod RW {}
193 }
194 #[doc = "set the current bias of low power comparator 0x0: 50 nA 0x1: 100 nA 0x2: 200 nA 0x3: 400 nA"]
195 pub mod LP_CMP_ISRC_SEL {
196 pub const offset: u32 = 12;
197 pub const mask: u32 = 0x03 << offset;
198 pub mod R {}
199 pub mod W {}
200 pub mod RW {}
201 }
202 #[doc = "increase the threshold detection for common mode analog comparator"]
203 pub mod LOOPCTRL_HST_THRESH {
204 pub const offset: u32 = 21;
205 pub const mask: u32 = 0x01 << offset;
206 pub mod R {}
207 pub mod W {}
208 pub mod RW {}
209 }
210 #[doc = "Enable hysteresis in switching converter common mode analog comparators"]
211 pub mod LOOPCTRL_EN_HYST {
212 pub const offset: u32 = 23;
213 pub const mask: u32 = 0x01 << offset;
214 pub mod R {}
215 pub mod W {}
216 pub mod RW {}
217 }
218 #[doc = "trim bandgap voltage"]
219 pub mod VBG_TRIM {
220 pub const offset: u32 = 24;
221 pub const mask: u32 = 0x1f << offset;
222 pub mod R {}
223 pub mod W {}
224 pub mod RW {}
225 }
226}
227#[doc = "DCDC Register 2"]
228pub mod REG2 {
229 #[doc = "Ratio of integral control parameter to proportional control parameter in the switching DC-DC converter, and can be used to optimize efficiency and loop response"]
230 pub mod LOOPCTRL_DC_C {
231 pub const offset: u32 = 0;
232 pub const mask: u32 = 0x03 << offset;
233 pub mod R {}
234 pub mod W {}
235 pub mod RW {}
236 }
237 #[doc = "Magnitude of proportional control parameter in the switching DC-DC converter control loop."]
238 pub mod LOOPCTRL_DC_R {
239 pub const offset: u32 = 2;
240 pub const mask: u32 = 0x0f << offset;
241 pub mod R {}
242 pub mod W {}
243 pub mod RW {}
244 }
245 #[doc = "Two's complement feed forward step in duty cycle in the switching DC-DC converter"]
246 pub mod LOOPCTRL_DC_FF {
247 pub const offset: u32 = 6;
248 pub const mask: u32 = 0x07 << offset;
249 pub mod R {}
250 pub mod W {}
251 pub mod RW {}
252 }
253 #[doc = "Enable analog circuit of DC-DC converter to respond faster under transient load conditions."]
254 pub mod LOOPCTRL_EN_RCSCALE {
255 pub const offset: u32 = 9;
256 pub const mask: u32 = 0x07 << offset;
257 pub mod R {}
258 pub mod W {}
259 pub mod RW {}
260 }
261 #[doc = "Increase the threshold detection for RC scale circuit."]
262 pub mod LOOPCTRL_RCSCALE_THRSH {
263 pub const offset: u32 = 12;
264 pub const mask: u32 = 0x01 << offset;
265 pub mod R {}
266 pub mod W {}
267 pub mod RW {}
268 }
269 #[doc = "Invert the sign of the hysteresis in DC-DC analog comparators."]
270 pub mod LOOPCTRL_HYST_SIGN {
271 pub const offset: u32 = 13;
272 pub const mask: u32 = 0x01 << offset;
273 pub mod R {}
274 pub mod W {}
275 pub mod RW {}
276 }
277 #[doc = "Set to \"0\" : stop charging if the duty cycle is lower than what set by dcdc_neglimit_in"]
278 pub mod DISABLE_PULSE_SKIP {
279 pub const offset: u32 = 27;
280 pub const mask: u32 = 0x01 << offset;
281 pub mod R {}
282 pub mod W {}
283 pub mod RW {}
284 }
285 #[doc = "Set high to improve the transition from heavy load to light load"]
286 pub mod DCM_SET_CTRL {
287 pub const offset: u32 = 28;
288 pub const mask: u32 = 0x01 << offset;
289 pub mod R {}
290 pub mod W {}
291 pub mod RW {}
292 }
293}
294#[doc = "DCDC Register 3"]
295pub mod REG3 {
296 #[doc = "Target value of VDD_SOC, 25 mV each step 0x0: 0.8V 0xE: 1.15V 0x1F:1.575V"]
297 pub mod TRG {
298 pub const offset: u32 = 0;
299 pub const mask: u32 = 0x1f << offset;
300 pub mod R {}
301 pub mod W {}
302 pub mod RW {}
303 }
304 #[doc = "Target value of standby (low power) mode 0x0: 0"]
305 pub mod TARGET_LP {
306 pub const offset: u32 = 8;
307 pub const mask: u32 = 0x07 << offset;
308 pub mod R {}
309 pub mod W {}
310 pub mod RW {}
311 }
312 #[doc = "Set DCDC clock to half freqeuncy for continuous mode"]
313 pub mod MINPWR_DC_HALFCLK {
314 pub const offset: u32 = 24;
315 pub const mask: u32 = 0x01 << offset;
316 pub mod R {}
317 pub mod W {}
318 pub mod RW {}
319 }
320 #[doc = "Ajust delay to reduce ground noise"]
321 pub mod MISC_DELAY_TIMING {
322 pub const offset: u32 = 27;
323 pub const mask: u32 = 0x01 << offset;
324 pub mod R {}
325 pub mod W {}
326 pub mod RW {}
327 }
328 #[doc = "Disable stepping for the output VDD_SOC of DCDC"]
329 pub mod DISABLE_STEP {
330 pub const offset: u32 = 30;
331 pub const mask: u32 = 0x01 << offset;
332 pub mod R {}
333 pub mod W {}
334 pub mod RW {}
335 }
336}