1#[doc = "DMA"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "Control Register"]
5 pub CR: crate::RWRegister<u32>,
6 #[doc = "Error Status Register"]
7 pub ES: crate::RORegister<u32>,
8 _reserved0: [u8; 0x04],
9 #[doc = "Enable Request Register"]
10 pub ERQ: crate::RWRegister<u32>,
11 _reserved1: [u8; 0x04],
12 #[doc = "Enable Error Interrupt Register"]
13 pub EEI: crate::RWRegister<u32>,
14 #[doc = "Clear Enable Error Interrupt Register"]
15 pub CEEI: crate::RWRegister<u8>,
16 #[doc = "Set Enable Error Interrupt Register"]
17 pub SEEI: crate::RWRegister<u8>,
18 #[doc = "Clear Enable Request Register"]
19 pub CERQ: crate::RWRegister<u8>,
20 #[doc = "Set Enable Request Register"]
21 pub SERQ: crate::RWRegister<u8>,
22 #[doc = "Clear DONE Status Bit Register"]
23 pub CDNE: crate::RWRegister<u8>,
24 #[doc = "Set START Bit Register"]
25 pub SSRT: crate::RWRegister<u8>,
26 #[doc = "Clear Error Register"]
27 pub CERR: crate::RWRegister<u8>,
28 #[doc = "Clear Interrupt Request Register"]
29 pub CINT: crate::RWRegister<u8>,
30 _reserved2: [u8; 0x04],
31 #[doc = "Interrupt Request Register"]
32 pub INT: crate::RWRegister<u32>,
33 _reserved3: [u8; 0x04],
34 #[doc = "Error Register"]
35 pub ERR: crate::RWRegister<u32>,
36 _reserved4: [u8; 0x04],
37 #[doc = "Hardware Request Status Register"]
38 pub HRS: crate::RORegister<u32>,
39 _reserved5: [u8; 0x0c],
40 #[doc = "Enable Asynchronous Request in Stop Register"]
41 pub EARS: crate::RWRegister<u32>,
42 _reserved6: [u8; 0xb8],
43 #[doc = "Channel n Priority Register"]
44 pub DCHPRI3: crate::RWRegister<u8>,
45 #[doc = "Channel n Priority Register"]
46 pub DCHPRI2: crate::RWRegister<u8>,
47 #[doc = "Channel n Priority Register"]
48 pub DCHPRI1: crate::RWRegister<u8>,
49 #[doc = "Channel n Priority Register"]
50 pub DCHPRI0: crate::RWRegister<u8>,
51 #[doc = "Channel n Priority Register"]
52 pub DCHPRI7: crate::RWRegister<u8>,
53 #[doc = "Channel n Priority Register"]
54 pub DCHPRI6: crate::RWRegister<u8>,
55 #[doc = "Channel n Priority Register"]
56 pub DCHPRI5: crate::RWRegister<u8>,
57 #[doc = "Channel n Priority Register"]
58 pub DCHPRI4: crate::RWRegister<u8>,
59 #[doc = "Channel n Priority Register"]
60 pub DCHPRI11: crate::RWRegister<u8>,
61 #[doc = "Channel n Priority Register"]
62 pub DCHPRI10: crate::RWRegister<u8>,
63 #[doc = "Channel n Priority Register"]
64 pub DCHPRI9: crate::RWRegister<u8>,
65 #[doc = "Channel n Priority Register"]
66 pub DCHPRI8: crate::RWRegister<u8>,
67 #[doc = "Channel n Priority Register"]
68 pub DCHPRI15: crate::RWRegister<u8>,
69 #[doc = "Channel n Priority Register"]
70 pub DCHPRI14: crate::RWRegister<u8>,
71 #[doc = "Channel n Priority Register"]
72 pub DCHPRI13: crate::RWRegister<u8>,
73 #[doc = "Channel n Priority Register"]
74 pub DCHPRI12: crate::RWRegister<u8>,
75 #[doc = "Channel n Priority Register"]
76 pub DCHPRI19: crate::RWRegister<u8>,
77 #[doc = "Channel n Priority Register"]
78 pub DCHPRI18: crate::RWRegister<u8>,
79 #[doc = "Channel n Priority Register"]
80 pub DCHPRI17: crate::RWRegister<u8>,
81 #[doc = "Channel n Priority Register"]
82 pub DCHPRI16: crate::RWRegister<u8>,
83 #[doc = "Channel n Priority Register"]
84 pub DCHPRI23: crate::RWRegister<u8>,
85 #[doc = "Channel n Priority Register"]
86 pub DCHPRI22: crate::RWRegister<u8>,
87 #[doc = "Channel n Priority Register"]
88 pub DCHPRI21: crate::RWRegister<u8>,
89 #[doc = "Channel n Priority Register"]
90 pub DCHPRI20: crate::RWRegister<u8>,
91 #[doc = "Channel n Priority Register"]
92 pub DCHPRI27: crate::RWRegister<u8>,
93 #[doc = "Channel n Priority Register"]
94 pub DCHPRI26: crate::RWRegister<u8>,
95 #[doc = "Channel n Priority Register"]
96 pub DCHPRI25: crate::RWRegister<u8>,
97 #[doc = "Channel n Priority Register"]
98 pub DCHPRI24: crate::RWRegister<u8>,
99 #[doc = "Channel n Priority Register"]
100 pub DCHPRI31: crate::RWRegister<u8>,
101 #[doc = "Channel n Priority Register"]
102 pub DCHPRI30: crate::RWRegister<u8>,
103 #[doc = "Channel n Priority Register"]
104 pub DCHPRI29: crate::RWRegister<u8>,
105 #[doc = "Channel n Priority Register"]
106 pub DCHPRI28: crate::RWRegister<u8>,
107 _reserved7: [u8; 0x0ee0],
108 #[doc = "Cluster TCD%s, containing TCD*_SADDR, TCD*_SOFF, TCD*_ATTR, TCD*_NBYTES_MLNO, TCD*_NBYTES_MLOFFNO, TCD*_NBYTES_MLOFFYES, TCD*_SLAST, TCD*_DADDR, TCD*_DOFF, TCD*_CITER_ELINKNO, TCD*_CITER_ELINKYES, TCD*_DLASTSGA, TCD*_CSR, TCD*_BITER_ELINKNO, TCD*_BITER_ELINKYES"]
109 pub TCD: [tcd::RegisterBlock; 32usize],
110}
111#[doc = "Control Register"]
112pub mod CR {
113 #[doc = "Enable Debug"]
114 pub mod EDBG {
115 pub const offset: u32 = 1;
116 pub const mask: u32 = 0x01 << offset;
117 pub mod R {}
118 pub mod W {}
119 pub mod RW {
120 #[doc = "When in debug mode, the DMA continues to operate."]
121 pub const EDBG_0: u32 = 0;
122 #[doc = "When in debug mode, the DMA stalls the start of a new channel. Executing channels are allowed to complete. Channel execution resumes when the system exits debug mode or the EDBG bit is cleared."]
123 pub const EDBG_1: u32 = 0x01;
124 }
125 }
126 #[doc = "Enable Round Robin Channel Arbitration"]
127 pub mod ERCA {
128 pub const offset: u32 = 2;
129 pub const mask: u32 = 0x01 << offset;
130 pub mod R {}
131 pub mod W {}
132 pub mod RW {
133 #[doc = "Fixed priority arbitration is used for channel selection ."]
134 pub const ERCA_0: u32 = 0;
135 #[doc = "Round robin arbitration is used for channel selection ."]
136 pub const ERCA_1: u32 = 0x01;
137 }
138 }
139 #[doc = "Enable Round Robin Group Arbitration"]
140 pub mod ERGA {
141 pub const offset: u32 = 3;
142 pub const mask: u32 = 0x01 << offset;
143 pub mod R {}
144 pub mod W {}
145 pub mod RW {
146 #[doc = "Fixed priority arbitration is used for selection among the groups."]
147 pub const ERGA_0: u32 = 0;
148 #[doc = "Round robin arbitration is used for selection among the groups."]
149 pub const ERGA_1: u32 = 0x01;
150 }
151 }
152 #[doc = "Halt On Error"]
153 pub mod HOE {
154 pub const offset: u32 = 4;
155 pub const mask: u32 = 0x01 << offset;
156 pub mod R {}
157 pub mod W {}
158 pub mod RW {
159 #[doc = "Normal operation"]
160 pub const HOE_0: u32 = 0;
161 #[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
162 pub const HOE_1: u32 = 0x01;
163 }
164 }
165 #[doc = "Halt DMA Operations"]
166 pub mod HALT {
167 pub const offset: u32 = 5;
168 pub const mask: u32 = 0x01 << offset;
169 pub mod R {}
170 pub mod W {}
171 pub mod RW {
172 #[doc = "Normal operation"]
173 pub const HALT_0: u32 = 0;
174 #[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
175 pub const HALT_1: u32 = 0x01;
176 }
177 }
178 #[doc = "Continuous Link Mode"]
179 pub mod CLM {
180 pub const offset: u32 = 6;
181 pub const mask: u32 = 0x01 << offset;
182 pub mod R {}
183 pub mod W {}
184 pub mod RW {
185 #[doc = "A minor loop channel link made to itself goes through channel arbitration before being activated again."]
186 pub const CLM_0: u32 = 0;
187 #[doc = "A minor loop channel link made to itself does not go through channel arbitration before being activated again. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets and restarts the next minor loop."]
188 pub const CLM_1: u32 = 0x01;
189 }
190 }
191 #[doc = "Enable Minor Loop Mapping"]
192 pub mod EMLM {
193 pub const offset: u32 = 7;
194 pub const mask: u32 = 0x01 << offset;
195 pub mod R {}
196 pub mod W {}
197 pub mod RW {
198 #[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
199 pub const EMLM_0: u32 = 0;
200 #[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
201 pub const EMLM_1: u32 = 0x01;
202 }
203 }
204 #[doc = "Channel Group 0 Priority"]
205 pub mod GRP0PRI {
206 pub const offset: u32 = 8;
207 pub const mask: u32 = 0x01 << offset;
208 pub mod R {}
209 pub mod W {}
210 pub mod RW {}
211 }
212 #[doc = "Channel Group 1 Priority"]
213 pub mod GRP1PRI {
214 pub const offset: u32 = 10;
215 pub const mask: u32 = 0x01 << offset;
216 pub mod R {}
217 pub mod W {}
218 pub mod RW {}
219 }
220 #[doc = "Error Cancel Transfer"]
221 pub mod ECX {
222 pub const offset: u32 = 16;
223 pub const mask: u32 = 0x01 << offset;
224 pub mod R {}
225 pub mod W {}
226 pub mod RW {
227 #[doc = "Normal operation"]
228 pub const ECX_0: u32 = 0;
229 #[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
230 pub const ECX_1: u32 = 0x01;
231 }
232 }
233 #[doc = "Cancel Transfer"]
234 pub mod CX {
235 pub const offset: u32 = 17;
236 pub const mask: u32 = 0x01 << offset;
237 pub mod R {}
238 pub mod W {}
239 pub mod RW {
240 #[doc = "Normal operation"]
241 pub const CX_0: u32 = 0;
242 #[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
243 pub const CX_1: u32 = 0x01;
244 }
245 }
246 #[doc = "DMA Active Status"]
247 pub mod ACTIVE {
248 pub const offset: u32 = 31;
249 pub const mask: u32 = 0x01 << offset;
250 pub mod R {}
251 pub mod W {}
252 pub mod RW {
253 #[doc = "eDMA is idle."]
254 pub const ACTIVE_0: u32 = 0;
255 #[doc = "eDMA is executing a channel."]
256 pub const ACTIVE_1: u32 = 0x01;
257 }
258 }
259}
260#[doc = "Error Status Register"]
261pub mod ES {
262 #[doc = "Destination Bus Error"]
263 pub mod DBE {
264 pub const offset: u32 = 0;
265 pub const mask: u32 = 0x01 << offset;
266 pub mod R {}
267 pub mod W {}
268 pub mod RW {
269 #[doc = "No destination bus error"]
270 pub const DBE_0: u32 = 0;
271 #[doc = "The last recorded error was a bus error on a destination write"]
272 pub const DBE_1: u32 = 0x01;
273 }
274 }
275 #[doc = "Source Bus Error"]
276 pub mod SBE {
277 pub const offset: u32 = 1;
278 pub const mask: u32 = 0x01 << offset;
279 pub mod R {}
280 pub mod W {}
281 pub mod RW {
282 #[doc = "No source bus error"]
283 pub const SBE_0: u32 = 0;
284 #[doc = "The last recorded error was a bus error on a source read"]
285 pub const SBE_1: u32 = 0x01;
286 }
287 }
288 #[doc = "Scatter/Gather Configuration Error"]
289 pub mod SGE {
290 pub const offset: u32 = 2;
291 pub const mask: u32 = 0x01 << offset;
292 pub mod R {}
293 pub mod W {}
294 pub mod RW {
295 #[doc = "No scatter/gather configuration error"]
296 pub const SGE_0: u32 = 0;
297 #[doc = "The last recorded error was a configuration error detected in the TCDn_DLASTSGA field. This field is checked at the beginning of a scatter/gather operation after major loop completion if TCDn_CSR\\[ESG\\] is enabled. TCDn_DLASTSGA is not on a 32 byte boundary."]
298 pub const SGE_1: u32 = 0x01;
299 }
300 }
301 #[doc = "NBYTES/CITER Configuration Error"]
302 pub mod NCE {
303 pub const offset: u32 = 3;
304 pub const mask: u32 = 0x01 << offset;
305 pub mod R {}
306 pub mod W {}
307 pub mod RW {
308 #[doc = "No NBYTES/CITER configuration error"]
309 pub const NCE_0: u32 = 0;
310 #[doc = "The last recorded error was a configuration error detected in the TCDn_NBYTES or TCDn_CITER fields. TCDn_NBYTES is not a multiple of TCDn_ATTR\\[SSIZE\\] and TCDn_ATTR\\[DSIZE\\], or TCDn_CITER\\[CITER\\] is equal to zero, or TCDn_CITER\\[ELINK\\] is not equal to TCDn_BITER\\[ELINK\\]"]
311 pub const NCE_1: u32 = 0x01;
312 }
313 }
314 #[doc = "Destination Offset Error"]
315 pub mod DOE {
316 pub const offset: u32 = 4;
317 pub const mask: u32 = 0x01 << offset;
318 pub mod R {}
319 pub mod W {}
320 pub mod RW {
321 #[doc = "No destination offset configuration error"]
322 pub const DOE_0: u32 = 0;
323 #[doc = "The last recorded error was a configuration error detected in the TCDn_DOFF field. TCDn_DOFF is inconsistent with TCDn_ATTR\\[DSIZE\\]."]
324 pub const DOE_1: u32 = 0x01;
325 }
326 }
327 #[doc = "Destination Address Error"]
328 pub mod DAE {
329 pub const offset: u32 = 5;
330 pub const mask: u32 = 0x01 << offset;
331 pub mod R {}
332 pub mod W {}
333 pub mod RW {
334 #[doc = "No destination address configuration error"]
335 pub const DAE_0: u32 = 0;
336 #[doc = "The last recorded error was a configuration error detected in the TCDn_DADDR field. TCDn_DADDR is inconsistent with TCDn_ATTR\\[DSIZE\\]."]
337 pub const DAE_1: u32 = 0x01;
338 }
339 }
340 #[doc = "Source Offset Error"]
341 pub mod SOE {
342 pub const offset: u32 = 6;
343 pub const mask: u32 = 0x01 << offset;
344 pub mod R {}
345 pub mod W {}
346 pub mod RW {
347 #[doc = "No source offset configuration error"]
348 pub const SOE_0: u32 = 0;
349 #[doc = "The last recorded error was a configuration error detected in the TCDn_SOFF field. TCDn_SOFF is inconsistent with TCDn_ATTR\\[SSIZE\\]."]
350 pub const SOE_1: u32 = 0x01;
351 }
352 }
353 #[doc = "Source Address Error"]
354 pub mod SAE {
355 pub const offset: u32 = 7;
356 pub const mask: u32 = 0x01 << offset;
357 pub mod R {}
358 pub mod W {}
359 pub mod RW {
360 #[doc = "No source address configuration error."]
361 pub const SAE_0: u32 = 0;
362 #[doc = "The last recorded error was a configuration error detected in the TCDn_SADDR field. TCDn_SADDR is inconsistent with TCDn_ATTR\\[SSIZE\\]."]
363 pub const SAE_1: u32 = 0x01;
364 }
365 }
366 #[doc = "Error Channel Number or Canceled Channel Number"]
367 pub mod ERRCHN {
368 pub const offset: u32 = 8;
369 pub const mask: u32 = 0x1f << offset;
370 pub mod R {}
371 pub mod W {}
372 pub mod RW {}
373 }
374 #[doc = "Channel Priority Error"]
375 pub mod CPE {
376 pub const offset: u32 = 14;
377 pub const mask: u32 = 0x01 << offset;
378 pub mod R {}
379 pub mod W {}
380 pub mod RW {
381 #[doc = "No channel priority error"]
382 pub const CPE_0: u32 = 0;
383 #[doc = "The last recorded error was a configuration error in the channel priorities . Channel priorities are not unique."]
384 pub const CPE_1: u32 = 0x01;
385 }
386 }
387 #[doc = "Group Priority Error"]
388 pub mod GPE {
389 pub const offset: u32 = 15;
390 pub const mask: u32 = 0x01 << offset;
391 pub mod R {}
392 pub mod W {}
393 pub mod RW {
394 #[doc = "No group priority error"]
395 pub const GPE_0: u32 = 0;
396 #[doc = "The last recorded error was a configuration error among the group priorities. All group priorities are not unique."]
397 pub const GPE_1: u32 = 0x01;
398 }
399 }
400 #[doc = "Transfer Canceled"]
401 pub mod ECX {
402 pub const offset: u32 = 16;
403 pub const mask: u32 = 0x01 << offset;
404 pub mod R {}
405 pub mod W {}
406 pub mod RW {
407 #[doc = "No canceled transfers"]
408 pub const ECX_0: u32 = 0;
409 #[doc = "The last recorded entry was a canceled transfer by the error cancel transfer input"]
410 pub const ECX_1: u32 = 0x01;
411 }
412 }
413 #[doc = "VLD"]
414 pub mod VLD {
415 pub const offset: u32 = 31;
416 pub const mask: u32 = 0x01 << offset;
417 pub mod R {}
418 pub mod W {}
419 pub mod RW {
420 #[doc = "No ERR bits are set."]
421 pub const VLD_0: u32 = 0;
422 #[doc = "At least one ERR bit is set indicating a valid error exists that has not been cleared."]
423 pub const VLD_1: u32 = 0x01;
424 }
425 }
426}
427#[doc = "Enable Request Register"]
428pub mod ERQ {
429 #[doc = "Enable DMA Request 0"]
430 pub mod ERQ0 {
431 pub const offset: u32 = 0;
432 pub const mask: u32 = 0x01 << offset;
433 pub mod R {}
434 pub mod W {}
435 pub mod RW {
436 #[doc = "The DMA request signal for the corresponding channel is disabled"]
437 pub const ERQ0_0: u32 = 0;
438 #[doc = "The DMA request signal for the corresponding channel is enabled"]
439 pub const ERQ0_1: u32 = 0x01;
440 }
441 }
442 #[doc = "Enable DMA Request 1"]
443 pub mod ERQ1 {
444 pub const offset: u32 = 1;
445 pub const mask: u32 = 0x01 << offset;
446 pub mod R {}
447 pub mod W {}
448 pub mod RW {
449 #[doc = "The DMA request signal for the corresponding channel is disabled"]
450 pub const ERQ1_0: u32 = 0;
451 #[doc = "The DMA request signal for the corresponding channel is enabled"]
452 pub const ERQ1_1: u32 = 0x01;
453 }
454 }
455 #[doc = "Enable DMA Request 2"]
456 pub mod ERQ2 {
457 pub const offset: u32 = 2;
458 pub const mask: u32 = 0x01 << offset;
459 pub mod R {}
460 pub mod W {}
461 pub mod RW {
462 #[doc = "The DMA request signal for the corresponding channel is disabled"]
463 pub const ERQ2_0: u32 = 0;
464 #[doc = "The DMA request signal for the corresponding channel is enabled"]
465 pub const ERQ2_1: u32 = 0x01;
466 }
467 }
468 #[doc = "Enable DMA Request 3"]
469 pub mod ERQ3 {
470 pub const offset: u32 = 3;
471 pub const mask: u32 = 0x01 << offset;
472 pub mod R {}
473 pub mod W {}
474 pub mod RW {
475 #[doc = "The DMA request signal for the corresponding channel is disabled"]
476 pub const ERQ3_0: u32 = 0;
477 #[doc = "The DMA request signal for the corresponding channel is enabled"]
478 pub const ERQ3_1: u32 = 0x01;
479 }
480 }
481 #[doc = "Enable DMA Request 4"]
482 pub mod ERQ4 {
483 pub const offset: u32 = 4;
484 pub const mask: u32 = 0x01 << offset;
485 pub mod R {}
486 pub mod W {}
487 pub mod RW {
488 #[doc = "The DMA request signal for the corresponding channel is disabled"]
489 pub const ERQ4_0: u32 = 0;
490 #[doc = "The DMA request signal for the corresponding channel is enabled"]
491 pub const ERQ4_1: u32 = 0x01;
492 }
493 }
494 #[doc = "Enable DMA Request 5"]
495 pub mod ERQ5 {
496 pub const offset: u32 = 5;
497 pub const mask: u32 = 0x01 << offset;
498 pub mod R {}
499 pub mod W {}
500 pub mod RW {
501 #[doc = "The DMA request signal for the corresponding channel is disabled"]
502 pub const ERQ5_0: u32 = 0;
503 #[doc = "The DMA request signal for the corresponding channel is enabled"]
504 pub const ERQ5_1: u32 = 0x01;
505 }
506 }
507 #[doc = "Enable DMA Request 6"]
508 pub mod ERQ6 {
509 pub const offset: u32 = 6;
510 pub const mask: u32 = 0x01 << offset;
511 pub mod R {}
512 pub mod W {}
513 pub mod RW {
514 #[doc = "The DMA request signal for the corresponding channel is disabled"]
515 pub const ERQ6_0: u32 = 0;
516 #[doc = "The DMA request signal for the corresponding channel is enabled"]
517 pub const ERQ6_1: u32 = 0x01;
518 }
519 }
520 #[doc = "Enable DMA Request 7"]
521 pub mod ERQ7 {
522 pub const offset: u32 = 7;
523 pub const mask: u32 = 0x01 << offset;
524 pub mod R {}
525 pub mod W {}
526 pub mod RW {
527 #[doc = "The DMA request signal for the corresponding channel is disabled"]
528 pub const ERQ7_0: u32 = 0;
529 #[doc = "The DMA request signal for the corresponding channel is enabled"]
530 pub const ERQ7_1: u32 = 0x01;
531 }
532 }
533 #[doc = "Enable DMA Request 8"]
534 pub mod ERQ8 {
535 pub const offset: u32 = 8;
536 pub const mask: u32 = 0x01 << offset;
537 pub mod R {}
538 pub mod W {}
539 pub mod RW {
540 #[doc = "The DMA request signal for the corresponding channel is disabled"]
541 pub const ERQ8_0: u32 = 0;
542 #[doc = "The DMA request signal for the corresponding channel is enabled"]
543 pub const ERQ8_1: u32 = 0x01;
544 }
545 }
546 #[doc = "Enable DMA Request 9"]
547 pub mod ERQ9 {
548 pub const offset: u32 = 9;
549 pub const mask: u32 = 0x01 << offset;
550 pub mod R {}
551 pub mod W {}
552 pub mod RW {
553 #[doc = "The DMA request signal for the corresponding channel is disabled"]
554 pub const ERQ9_0: u32 = 0;
555 #[doc = "The DMA request signal for the corresponding channel is enabled"]
556 pub const ERQ9_1: u32 = 0x01;
557 }
558 }
559 #[doc = "Enable DMA Request 10"]
560 pub mod ERQ10 {
561 pub const offset: u32 = 10;
562 pub const mask: u32 = 0x01 << offset;
563 pub mod R {}
564 pub mod W {}
565 pub mod RW {
566 #[doc = "The DMA request signal for the corresponding channel is disabled"]
567 pub const ERQ10_0: u32 = 0;
568 #[doc = "The DMA request signal for the corresponding channel is enabled"]
569 pub const ERQ10_1: u32 = 0x01;
570 }
571 }
572 #[doc = "Enable DMA Request 11"]
573 pub mod ERQ11 {
574 pub const offset: u32 = 11;
575 pub const mask: u32 = 0x01 << offset;
576 pub mod R {}
577 pub mod W {}
578 pub mod RW {
579 #[doc = "The DMA request signal for the corresponding channel is disabled"]
580 pub const ERQ11_0: u32 = 0;
581 #[doc = "The DMA request signal for the corresponding channel is enabled"]
582 pub const ERQ11_1: u32 = 0x01;
583 }
584 }
585 #[doc = "Enable DMA Request 12"]
586 pub mod ERQ12 {
587 pub const offset: u32 = 12;
588 pub const mask: u32 = 0x01 << offset;
589 pub mod R {}
590 pub mod W {}
591 pub mod RW {
592 #[doc = "The DMA request signal for the corresponding channel is disabled"]
593 pub const ERQ12_0: u32 = 0;
594 #[doc = "The DMA request signal for the corresponding channel is enabled"]
595 pub const ERQ12_1: u32 = 0x01;
596 }
597 }
598 #[doc = "Enable DMA Request 13"]
599 pub mod ERQ13 {
600 pub const offset: u32 = 13;
601 pub const mask: u32 = 0x01 << offset;
602 pub mod R {}
603 pub mod W {}
604 pub mod RW {
605 #[doc = "The DMA request signal for the corresponding channel is disabled"]
606 pub const ERQ13_0: u32 = 0;
607 #[doc = "The DMA request signal for the corresponding channel is enabled"]
608 pub const ERQ13_1: u32 = 0x01;
609 }
610 }
611 #[doc = "Enable DMA Request 14"]
612 pub mod ERQ14 {
613 pub const offset: u32 = 14;
614 pub const mask: u32 = 0x01 << offset;
615 pub mod R {}
616 pub mod W {}
617 pub mod RW {
618 #[doc = "The DMA request signal for the corresponding channel is disabled"]
619 pub const ERQ14_0: u32 = 0;
620 #[doc = "The DMA request signal for the corresponding channel is enabled"]
621 pub const ERQ14_1: u32 = 0x01;
622 }
623 }
624 #[doc = "Enable DMA Request 15"]
625 pub mod ERQ15 {
626 pub const offset: u32 = 15;
627 pub const mask: u32 = 0x01 << offset;
628 pub mod R {}
629 pub mod W {}
630 pub mod RW {
631 #[doc = "The DMA request signal for the corresponding channel is disabled"]
632 pub const ERQ15_0: u32 = 0;
633 #[doc = "The DMA request signal for the corresponding channel is enabled"]
634 pub const ERQ15_1: u32 = 0x01;
635 }
636 }
637 #[doc = "Enable DMA Request 16"]
638 pub mod ERQ16 {
639 pub const offset: u32 = 16;
640 pub const mask: u32 = 0x01 << offset;
641 pub mod R {}
642 pub mod W {}
643 pub mod RW {
644 #[doc = "The DMA request signal for the corresponding channel is disabled"]
645 pub const ERQ16_0: u32 = 0;
646 #[doc = "The DMA request signal for the corresponding channel is enabled"]
647 pub const ERQ16_1: u32 = 0x01;
648 }
649 }
650 #[doc = "Enable DMA Request 17"]
651 pub mod ERQ17 {
652 pub const offset: u32 = 17;
653 pub const mask: u32 = 0x01 << offset;
654 pub mod R {}
655 pub mod W {}
656 pub mod RW {
657 #[doc = "The DMA request signal for the corresponding channel is disabled"]
658 pub const ERQ17_0: u32 = 0;
659 #[doc = "The DMA request signal for the corresponding channel is enabled"]
660 pub const ERQ17_1: u32 = 0x01;
661 }
662 }
663 #[doc = "Enable DMA Request 18"]
664 pub mod ERQ18 {
665 pub const offset: u32 = 18;
666 pub const mask: u32 = 0x01 << offset;
667 pub mod R {}
668 pub mod W {}
669 pub mod RW {
670 #[doc = "The DMA request signal for the corresponding channel is disabled"]
671 pub const ERQ18_0: u32 = 0;
672 #[doc = "The DMA request signal for the corresponding channel is enabled"]
673 pub const ERQ18_1: u32 = 0x01;
674 }
675 }
676 #[doc = "Enable DMA Request 19"]
677 pub mod ERQ19 {
678 pub const offset: u32 = 19;
679 pub const mask: u32 = 0x01 << offset;
680 pub mod R {}
681 pub mod W {}
682 pub mod RW {
683 #[doc = "The DMA request signal for the corresponding channel is disabled"]
684 pub const ERQ19_0: u32 = 0;
685 #[doc = "The DMA request signal for the corresponding channel is enabled"]
686 pub const ERQ19_1: u32 = 0x01;
687 }
688 }
689 #[doc = "Enable DMA Request 20"]
690 pub mod ERQ20 {
691 pub const offset: u32 = 20;
692 pub const mask: u32 = 0x01 << offset;
693 pub mod R {}
694 pub mod W {}
695 pub mod RW {
696 #[doc = "The DMA request signal for the corresponding channel is disabled"]
697 pub const ERQ20_0: u32 = 0;
698 #[doc = "The DMA request signal for the corresponding channel is enabled"]
699 pub const ERQ20_1: u32 = 0x01;
700 }
701 }
702 #[doc = "Enable DMA Request 21"]
703 pub mod ERQ21 {
704 pub const offset: u32 = 21;
705 pub const mask: u32 = 0x01 << offset;
706 pub mod R {}
707 pub mod W {}
708 pub mod RW {
709 #[doc = "The DMA request signal for the corresponding channel is disabled"]
710 pub const ERQ21_0: u32 = 0;
711 #[doc = "The DMA request signal for the corresponding channel is enabled"]
712 pub const ERQ21_1: u32 = 0x01;
713 }
714 }
715 #[doc = "Enable DMA Request 22"]
716 pub mod ERQ22 {
717 pub const offset: u32 = 22;
718 pub const mask: u32 = 0x01 << offset;
719 pub mod R {}
720 pub mod W {}
721 pub mod RW {
722 #[doc = "The DMA request signal for the corresponding channel is disabled"]
723 pub const ERQ22_0: u32 = 0;
724 #[doc = "The DMA request signal for the corresponding channel is enabled"]
725 pub const ERQ22_1: u32 = 0x01;
726 }
727 }
728 #[doc = "Enable DMA Request 23"]
729 pub mod ERQ23 {
730 pub const offset: u32 = 23;
731 pub const mask: u32 = 0x01 << offset;
732 pub mod R {}
733 pub mod W {}
734 pub mod RW {
735 #[doc = "The DMA request signal for the corresponding channel is disabled"]
736 pub const ERQ23_0: u32 = 0;
737 #[doc = "The DMA request signal for the corresponding channel is enabled"]
738 pub const ERQ23_1: u32 = 0x01;
739 }
740 }
741 #[doc = "Enable DMA Request 24"]
742 pub mod ERQ24 {
743 pub const offset: u32 = 24;
744 pub const mask: u32 = 0x01 << offset;
745 pub mod R {}
746 pub mod W {}
747 pub mod RW {
748 #[doc = "The DMA request signal for the corresponding channel is disabled"]
749 pub const ERQ24_0: u32 = 0;
750 #[doc = "The DMA request signal for the corresponding channel is enabled"]
751 pub const ERQ24_1: u32 = 0x01;
752 }
753 }
754 #[doc = "Enable DMA Request 25"]
755 pub mod ERQ25 {
756 pub const offset: u32 = 25;
757 pub const mask: u32 = 0x01 << offset;
758 pub mod R {}
759 pub mod W {}
760 pub mod RW {
761 #[doc = "The DMA request signal for the corresponding channel is disabled"]
762 pub const ERQ25_0: u32 = 0;
763 #[doc = "The DMA request signal for the corresponding channel is enabled"]
764 pub const ERQ25_1: u32 = 0x01;
765 }
766 }
767 #[doc = "Enable DMA Request 26"]
768 pub mod ERQ26 {
769 pub const offset: u32 = 26;
770 pub const mask: u32 = 0x01 << offset;
771 pub mod R {}
772 pub mod W {}
773 pub mod RW {
774 #[doc = "The DMA request signal for the corresponding channel is disabled"]
775 pub const ERQ26_0: u32 = 0;
776 #[doc = "The DMA request signal for the corresponding channel is enabled"]
777 pub const ERQ26_1: u32 = 0x01;
778 }
779 }
780 #[doc = "Enable DMA Request 27"]
781 pub mod ERQ27 {
782 pub const offset: u32 = 27;
783 pub const mask: u32 = 0x01 << offset;
784 pub mod R {}
785 pub mod W {}
786 pub mod RW {
787 #[doc = "The DMA request signal for the corresponding channel is disabled"]
788 pub const ERQ27_0: u32 = 0;
789 #[doc = "The DMA request signal for the corresponding channel is enabled"]
790 pub const ERQ27_1: u32 = 0x01;
791 }
792 }
793 #[doc = "Enable DMA Request 28"]
794 pub mod ERQ28 {
795 pub const offset: u32 = 28;
796 pub const mask: u32 = 0x01 << offset;
797 pub mod R {}
798 pub mod W {}
799 pub mod RW {
800 #[doc = "The DMA request signal for the corresponding channel is disabled"]
801 pub const ERQ28_0: u32 = 0;
802 #[doc = "The DMA request signal for the corresponding channel is enabled"]
803 pub const ERQ28_1: u32 = 0x01;
804 }
805 }
806 #[doc = "Enable DMA Request 29"]
807 pub mod ERQ29 {
808 pub const offset: u32 = 29;
809 pub const mask: u32 = 0x01 << offset;
810 pub mod R {}
811 pub mod W {}
812 pub mod RW {
813 #[doc = "The DMA request signal for the corresponding channel is disabled"]
814 pub const ERQ29_0: u32 = 0;
815 #[doc = "The DMA request signal for the corresponding channel is enabled"]
816 pub const ERQ29_1: u32 = 0x01;
817 }
818 }
819 #[doc = "Enable DMA Request 30"]
820 pub mod ERQ30 {
821 pub const offset: u32 = 30;
822 pub const mask: u32 = 0x01 << offset;
823 pub mod R {}
824 pub mod W {}
825 pub mod RW {
826 #[doc = "The DMA request signal for the corresponding channel is disabled"]
827 pub const ERQ30_0: u32 = 0;
828 #[doc = "The DMA request signal for the corresponding channel is enabled"]
829 pub const ERQ30_1: u32 = 0x01;
830 }
831 }
832 #[doc = "Enable DMA Request 31"]
833 pub mod ERQ31 {
834 pub const offset: u32 = 31;
835 pub const mask: u32 = 0x01 << offset;
836 pub mod R {}
837 pub mod W {}
838 pub mod RW {
839 #[doc = "The DMA request signal for the corresponding channel is disabled"]
840 pub const ERQ31_0: u32 = 0;
841 #[doc = "The DMA request signal for the corresponding channel is enabled"]
842 pub const ERQ31_1: u32 = 0x01;
843 }
844 }
845}
846#[doc = "Enable Error Interrupt Register"]
847pub mod EEI {
848 #[doc = "Enable Error Interrupt 0"]
849 pub mod EEI0 {
850 pub const offset: u32 = 0;
851 pub const mask: u32 = 0x01 << offset;
852 pub mod R {}
853 pub mod W {}
854 pub mod RW {
855 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
856 pub const EEI0_0: u32 = 0;
857 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
858 pub const EEI0_1: u32 = 0x01;
859 }
860 }
861 #[doc = "Enable Error Interrupt 1"]
862 pub mod EEI1 {
863 pub const offset: u32 = 1;
864 pub const mask: u32 = 0x01 << offset;
865 pub mod R {}
866 pub mod W {}
867 pub mod RW {
868 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
869 pub const EEI1_0: u32 = 0;
870 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
871 pub const EEI1_1: u32 = 0x01;
872 }
873 }
874 #[doc = "Enable Error Interrupt 2"]
875 pub mod EEI2 {
876 pub const offset: u32 = 2;
877 pub const mask: u32 = 0x01 << offset;
878 pub mod R {}
879 pub mod W {}
880 pub mod RW {
881 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
882 pub const EEI2_0: u32 = 0;
883 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
884 pub const EEI2_1: u32 = 0x01;
885 }
886 }
887 #[doc = "Enable Error Interrupt 3"]
888 pub mod EEI3 {
889 pub const offset: u32 = 3;
890 pub const mask: u32 = 0x01 << offset;
891 pub mod R {}
892 pub mod W {}
893 pub mod RW {
894 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
895 pub const EEI3_0: u32 = 0;
896 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
897 pub const EEI3_1: u32 = 0x01;
898 }
899 }
900 #[doc = "Enable Error Interrupt 4"]
901 pub mod EEI4 {
902 pub const offset: u32 = 4;
903 pub const mask: u32 = 0x01 << offset;
904 pub mod R {}
905 pub mod W {}
906 pub mod RW {
907 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
908 pub const EEI4_0: u32 = 0;
909 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
910 pub const EEI4_1: u32 = 0x01;
911 }
912 }
913 #[doc = "Enable Error Interrupt 5"]
914 pub mod EEI5 {
915 pub const offset: u32 = 5;
916 pub const mask: u32 = 0x01 << offset;
917 pub mod R {}
918 pub mod W {}
919 pub mod RW {
920 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
921 pub const EEI5_0: u32 = 0;
922 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
923 pub const EEI5_1: u32 = 0x01;
924 }
925 }
926 #[doc = "Enable Error Interrupt 6"]
927 pub mod EEI6 {
928 pub const offset: u32 = 6;
929 pub const mask: u32 = 0x01 << offset;
930 pub mod R {}
931 pub mod W {}
932 pub mod RW {
933 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
934 pub const EEI6_0: u32 = 0;
935 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
936 pub const EEI6_1: u32 = 0x01;
937 }
938 }
939 #[doc = "Enable Error Interrupt 7"]
940 pub mod EEI7 {
941 pub const offset: u32 = 7;
942 pub const mask: u32 = 0x01 << offset;
943 pub mod R {}
944 pub mod W {}
945 pub mod RW {
946 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
947 pub const EEI7_0: u32 = 0;
948 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
949 pub const EEI7_1: u32 = 0x01;
950 }
951 }
952 #[doc = "Enable Error Interrupt 8"]
953 pub mod EEI8 {
954 pub const offset: u32 = 8;
955 pub const mask: u32 = 0x01 << offset;
956 pub mod R {}
957 pub mod W {}
958 pub mod RW {
959 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
960 pub const EEI8_0: u32 = 0;
961 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
962 pub const EEI8_1: u32 = 0x01;
963 }
964 }
965 #[doc = "Enable Error Interrupt 9"]
966 pub mod EEI9 {
967 pub const offset: u32 = 9;
968 pub const mask: u32 = 0x01 << offset;
969 pub mod R {}
970 pub mod W {}
971 pub mod RW {
972 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
973 pub const EEI9_0: u32 = 0;
974 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
975 pub const EEI9_1: u32 = 0x01;
976 }
977 }
978 #[doc = "Enable Error Interrupt 10"]
979 pub mod EEI10 {
980 pub const offset: u32 = 10;
981 pub const mask: u32 = 0x01 << offset;
982 pub mod R {}
983 pub mod W {}
984 pub mod RW {
985 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
986 pub const EEI10_0: u32 = 0;
987 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
988 pub const EEI10_1: u32 = 0x01;
989 }
990 }
991 #[doc = "Enable Error Interrupt 11"]
992 pub mod EEI11 {
993 pub const offset: u32 = 11;
994 pub const mask: u32 = 0x01 << offset;
995 pub mod R {}
996 pub mod W {}
997 pub mod RW {
998 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
999 pub const EEI11_0: u32 = 0;
1000 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1001 pub const EEI11_1: u32 = 0x01;
1002 }
1003 }
1004 #[doc = "Enable Error Interrupt 12"]
1005 pub mod EEI12 {
1006 pub const offset: u32 = 12;
1007 pub const mask: u32 = 0x01 << offset;
1008 pub mod R {}
1009 pub mod W {}
1010 pub mod RW {
1011 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1012 pub const EEI12_0: u32 = 0;
1013 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1014 pub const EEI12_1: u32 = 0x01;
1015 }
1016 }
1017 #[doc = "Enable Error Interrupt 13"]
1018 pub mod EEI13 {
1019 pub const offset: u32 = 13;
1020 pub const mask: u32 = 0x01 << offset;
1021 pub mod R {}
1022 pub mod W {}
1023 pub mod RW {
1024 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1025 pub const EEI13_0: u32 = 0;
1026 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1027 pub const EEI13_1: u32 = 0x01;
1028 }
1029 }
1030 #[doc = "Enable Error Interrupt 14"]
1031 pub mod EEI14 {
1032 pub const offset: u32 = 14;
1033 pub const mask: u32 = 0x01 << offset;
1034 pub mod R {}
1035 pub mod W {}
1036 pub mod RW {
1037 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1038 pub const EEI14_0: u32 = 0;
1039 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1040 pub const EEI14_1: u32 = 0x01;
1041 }
1042 }
1043 #[doc = "Enable Error Interrupt 15"]
1044 pub mod EEI15 {
1045 pub const offset: u32 = 15;
1046 pub const mask: u32 = 0x01 << offset;
1047 pub mod R {}
1048 pub mod W {}
1049 pub mod RW {
1050 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1051 pub const EEI15_0: u32 = 0;
1052 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1053 pub const EEI15_1: u32 = 0x01;
1054 }
1055 }
1056 #[doc = "Enable Error Interrupt 16"]
1057 pub mod EEI16 {
1058 pub const offset: u32 = 16;
1059 pub const mask: u32 = 0x01 << offset;
1060 pub mod R {}
1061 pub mod W {}
1062 pub mod RW {
1063 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1064 pub const EEI16_0: u32 = 0;
1065 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1066 pub const EEI16_1: u32 = 0x01;
1067 }
1068 }
1069 #[doc = "Enable Error Interrupt 17"]
1070 pub mod EEI17 {
1071 pub const offset: u32 = 17;
1072 pub const mask: u32 = 0x01 << offset;
1073 pub mod R {}
1074 pub mod W {}
1075 pub mod RW {
1076 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1077 pub const EEI17_0: u32 = 0;
1078 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1079 pub const EEI17_1: u32 = 0x01;
1080 }
1081 }
1082 #[doc = "Enable Error Interrupt 18"]
1083 pub mod EEI18 {
1084 pub const offset: u32 = 18;
1085 pub const mask: u32 = 0x01 << offset;
1086 pub mod R {}
1087 pub mod W {}
1088 pub mod RW {
1089 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1090 pub const EEI18_0: u32 = 0;
1091 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1092 pub const EEI18_1: u32 = 0x01;
1093 }
1094 }
1095 #[doc = "Enable Error Interrupt 19"]
1096 pub mod EEI19 {
1097 pub const offset: u32 = 19;
1098 pub const mask: u32 = 0x01 << offset;
1099 pub mod R {}
1100 pub mod W {}
1101 pub mod RW {
1102 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1103 pub const EEI19_0: u32 = 0;
1104 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1105 pub const EEI19_1: u32 = 0x01;
1106 }
1107 }
1108 #[doc = "Enable Error Interrupt 20"]
1109 pub mod EEI20 {
1110 pub const offset: u32 = 20;
1111 pub const mask: u32 = 0x01 << offset;
1112 pub mod R {}
1113 pub mod W {}
1114 pub mod RW {
1115 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1116 pub const EEI20_0: u32 = 0;
1117 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1118 pub const EEI20_1: u32 = 0x01;
1119 }
1120 }
1121 #[doc = "Enable Error Interrupt 21"]
1122 pub mod EEI21 {
1123 pub const offset: u32 = 21;
1124 pub const mask: u32 = 0x01 << offset;
1125 pub mod R {}
1126 pub mod W {}
1127 pub mod RW {
1128 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1129 pub const EEI21_0: u32 = 0;
1130 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1131 pub const EEI21_1: u32 = 0x01;
1132 }
1133 }
1134 #[doc = "Enable Error Interrupt 22"]
1135 pub mod EEI22 {
1136 pub const offset: u32 = 22;
1137 pub const mask: u32 = 0x01 << offset;
1138 pub mod R {}
1139 pub mod W {}
1140 pub mod RW {
1141 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1142 pub const EEI22_0: u32 = 0;
1143 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1144 pub const EEI22_1: u32 = 0x01;
1145 }
1146 }
1147 #[doc = "Enable Error Interrupt 23"]
1148 pub mod EEI23 {
1149 pub const offset: u32 = 23;
1150 pub const mask: u32 = 0x01 << offset;
1151 pub mod R {}
1152 pub mod W {}
1153 pub mod RW {
1154 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1155 pub const EEI23_0: u32 = 0;
1156 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1157 pub const EEI23_1: u32 = 0x01;
1158 }
1159 }
1160 #[doc = "Enable Error Interrupt 24"]
1161 pub mod EEI24 {
1162 pub const offset: u32 = 24;
1163 pub const mask: u32 = 0x01 << offset;
1164 pub mod R {}
1165 pub mod W {}
1166 pub mod RW {
1167 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1168 pub const EEI24_0: u32 = 0;
1169 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1170 pub const EEI24_1: u32 = 0x01;
1171 }
1172 }
1173 #[doc = "Enable Error Interrupt 25"]
1174 pub mod EEI25 {
1175 pub const offset: u32 = 25;
1176 pub const mask: u32 = 0x01 << offset;
1177 pub mod R {}
1178 pub mod W {}
1179 pub mod RW {
1180 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1181 pub const EEI25_0: u32 = 0;
1182 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1183 pub const EEI25_1: u32 = 0x01;
1184 }
1185 }
1186 #[doc = "Enable Error Interrupt 26"]
1187 pub mod EEI26 {
1188 pub const offset: u32 = 26;
1189 pub const mask: u32 = 0x01 << offset;
1190 pub mod R {}
1191 pub mod W {}
1192 pub mod RW {
1193 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1194 pub const EEI26_0: u32 = 0;
1195 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1196 pub const EEI26_1: u32 = 0x01;
1197 }
1198 }
1199 #[doc = "Enable Error Interrupt 27"]
1200 pub mod EEI27 {
1201 pub const offset: u32 = 27;
1202 pub const mask: u32 = 0x01 << offset;
1203 pub mod R {}
1204 pub mod W {}
1205 pub mod RW {
1206 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1207 pub const EEI27_0: u32 = 0;
1208 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1209 pub const EEI27_1: u32 = 0x01;
1210 }
1211 }
1212 #[doc = "Enable Error Interrupt 28"]
1213 pub mod EEI28 {
1214 pub const offset: u32 = 28;
1215 pub const mask: u32 = 0x01 << offset;
1216 pub mod R {}
1217 pub mod W {}
1218 pub mod RW {
1219 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1220 pub const EEI28_0: u32 = 0;
1221 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1222 pub const EEI28_1: u32 = 0x01;
1223 }
1224 }
1225 #[doc = "Enable Error Interrupt 29"]
1226 pub mod EEI29 {
1227 pub const offset: u32 = 29;
1228 pub const mask: u32 = 0x01 << offset;
1229 pub mod R {}
1230 pub mod W {}
1231 pub mod RW {
1232 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1233 pub const EEI29_0: u32 = 0;
1234 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1235 pub const EEI29_1: u32 = 0x01;
1236 }
1237 }
1238 #[doc = "Enable Error Interrupt 30"]
1239 pub mod EEI30 {
1240 pub const offset: u32 = 30;
1241 pub const mask: u32 = 0x01 << offset;
1242 pub mod R {}
1243 pub mod W {}
1244 pub mod RW {
1245 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1246 pub const EEI30_0: u32 = 0;
1247 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1248 pub const EEI30_1: u32 = 0x01;
1249 }
1250 }
1251 #[doc = "Enable Error Interrupt 31"]
1252 pub mod EEI31 {
1253 pub const offset: u32 = 31;
1254 pub const mask: u32 = 0x01 << offset;
1255 pub mod R {}
1256 pub mod W {}
1257 pub mod RW {
1258 #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
1259 pub const EEI31_0: u32 = 0;
1260 #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
1261 pub const EEI31_1: u32 = 0x01;
1262 }
1263 }
1264}
1265#[doc = "Clear Enable Error Interrupt Register"]
1266pub mod CEEI {
1267 #[doc = "Clear Enable Error Interrupt"]
1268 pub mod CEEI {
1269 pub const offset: u8 = 0;
1270 pub const mask: u8 = 0x1f << offset;
1271 pub mod R {}
1272 pub mod W {}
1273 pub mod RW {}
1274 }
1275 #[doc = "Clear All Enable Error Interrupts"]
1276 pub mod CAEE {
1277 pub const offset: u8 = 6;
1278 pub const mask: u8 = 0x01 << offset;
1279 pub mod R {}
1280 pub mod W {}
1281 pub mod RW {
1282 #[doc = "Clear only the EEI bit specified in the CEEI field"]
1283 pub const CAEE_0: u8 = 0;
1284 #[doc = "Clear all bits in EEI"]
1285 pub const CAEE_1: u8 = 0x01;
1286 }
1287 }
1288 #[doc = "No Op enable"]
1289 pub mod NOP {
1290 pub const offset: u8 = 7;
1291 pub const mask: u8 = 0x01 << offset;
1292 pub mod R {}
1293 pub mod W {}
1294 pub mod RW {
1295 #[doc = "Normal operation"]
1296 pub const NOP_0: u8 = 0;
1297 #[doc = "No operation, ignore the other bits in this register"]
1298 pub const NOP_1: u8 = 0x01;
1299 }
1300 }
1301}
1302#[doc = "Set Enable Error Interrupt Register"]
1303pub mod SEEI {
1304 #[doc = "Set Enable Error Interrupt"]
1305 pub mod SEEI {
1306 pub const offset: u8 = 0;
1307 pub const mask: u8 = 0x1f << offset;
1308 pub mod R {}
1309 pub mod W {}
1310 pub mod RW {}
1311 }
1312 #[doc = "Sets All Enable Error Interrupts"]
1313 pub mod SAEE {
1314 pub const offset: u8 = 6;
1315 pub const mask: u8 = 0x01 << offset;
1316 pub mod R {}
1317 pub mod W {}
1318 pub mod RW {
1319 #[doc = "Set only the EEI bit specified in the SEEI field."]
1320 pub const SAEE_0: u8 = 0;
1321 #[doc = "Sets all bits in EEI"]
1322 pub const SAEE_1: u8 = 0x01;
1323 }
1324 }
1325 #[doc = "No Op enable"]
1326 pub mod NOP {
1327 pub const offset: u8 = 7;
1328 pub const mask: u8 = 0x01 << offset;
1329 pub mod R {}
1330 pub mod W {}
1331 pub mod RW {
1332 #[doc = "Normal operation"]
1333 pub const NOP_0: u8 = 0;
1334 #[doc = "No operation, ignore the other bits in this register"]
1335 pub const NOP_1: u8 = 0x01;
1336 }
1337 }
1338}
1339#[doc = "Clear Enable Request Register"]
1340pub mod CERQ {
1341 #[doc = "Clear Enable Request"]
1342 pub mod CERQ {
1343 pub const offset: u8 = 0;
1344 pub const mask: u8 = 0x1f << offset;
1345 pub mod R {}
1346 pub mod W {}
1347 pub mod RW {}
1348 }
1349 #[doc = "Clear All Enable Requests"]
1350 pub mod CAER {
1351 pub const offset: u8 = 6;
1352 pub const mask: u8 = 0x01 << offset;
1353 pub mod R {}
1354 pub mod W {}
1355 pub mod RW {
1356 #[doc = "Clear only the ERQ bit specified in the CERQ field"]
1357 pub const CAER_0: u8 = 0;
1358 #[doc = "Clear all bits in ERQ"]
1359 pub const CAER_1: u8 = 0x01;
1360 }
1361 }
1362 #[doc = "No Op enable"]
1363 pub mod NOP {
1364 pub const offset: u8 = 7;
1365 pub const mask: u8 = 0x01 << offset;
1366 pub mod R {}
1367 pub mod W {}
1368 pub mod RW {
1369 #[doc = "Normal operation"]
1370 pub const NOP_0: u8 = 0;
1371 #[doc = "No operation, ignore the other bits in this register"]
1372 pub const NOP_1: u8 = 0x01;
1373 }
1374 }
1375}
1376#[doc = "Set Enable Request Register"]
1377pub mod SERQ {
1378 #[doc = "Set Enable Request"]
1379 pub mod SERQ {
1380 pub const offset: u8 = 0;
1381 pub const mask: u8 = 0x1f << offset;
1382 pub mod R {}
1383 pub mod W {}
1384 pub mod RW {}
1385 }
1386 #[doc = "Set All Enable Requests"]
1387 pub mod SAER {
1388 pub const offset: u8 = 6;
1389 pub const mask: u8 = 0x01 << offset;
1390 pub mod R {}
1391 pub mod W {}
1392 pub mod RW {
1393 #[doc = "Set only the ERQ bit specified in the SERQ field"]
1394 pub const SAER_0: u8 = 0;
1395 #[doc = "Set all bits in ERQ"]
1396 pub const SAER_1: u8 = 0x01;
1397 }
1398 }
1399 #[doc = "No Op enable"]
1400 pub mod NOP {
1401 pub const offset: u8 = 7;
1402 pub const mask: u8 = 0x01 << offset;
1403 pub mod R {}
1404 pub mod W {}
1405 pub mod RW {
1406 #[doc = "Normal operation"]
1407 pub const NOP_0: u8 = 0;
1408 #[doc = "No operation, ignore the other bits in this register"]
1409 pub const NOP_1: u8 = 0x01;
1410 }
1411 }
1412}
1413#[doc = "Clear DONE Status Bit Register"]
1414pub mod CDNE {
1415 #[doc = "Clear DONE Bit"]
1416 pub mod CDNE {
1417 pub const offset: u8 = 0;
1418 pub const mask: u8 = 0x1f << offset;
1419 pub mod R {}
1420 pub mod W {}
1421 pub mod RW {}
1422 }
1423 #[doc = "Clears All DONE Bits"]
1424 pub mod CADN {
1425 pub const offset: u8 = 6;
1426 pub const mask: u8 = 0x01 << offset;
1427 pub mod R {}
1428 pub mod W {}
1429 pub mod RW {
1430 #[doc = "Clears only the TCDn_CSR\\[DONE\\] bit specified in the CDNE field"]
1431 pub const CADN_0: u8 = 0;
1432 #[doc = "Clears all bits in TCDn_CSR\\[DONE\\]"]
1433 pub const CADN_1: u8 = 0x01;
1434 }
1435 }
1436 #[doc = "No Op enable"]
1437 pub mod NOP {
1438 pub const offset: u8 = 7;
1439 pub const mask: u8 = 0x01 << offset;
1440 pub mod R {}
1441 pub mod W {}
1442 pub mod RW {
1443 #[doc = "Normal operation"]
1444 pub const NOP_0: u8 = 0;
1445 #[doc = "No operation, ignore the other bits in this register"]
1446 pub const NOP_1: u8 = 0x01;
1447 }
1448 }
1449}
1450#[doc = "Set START Bit Register"]
1451pub mod SSRT {
1452 #[doc = "Set START Bit"]
1453 pub mod SSRT {
1454 pub const offset: u8 = 0;
1455 pub const mask: u8 = 0x1f << offset;
1456 pub mod R {}
1457 pub mod W {}
1458 pub mod RW {}
1459 }
1460 #[doc = "Set All START Bits (activates all channels)"]
1461 pub mod SAST {
1462 pub const offset: u8 = 6;
1463 pub const mask: u8 = 0x01 << offset;
1464 pub mod R {}
1465 pub mod W {}
1466 pub mod RW {
1467 #[doc = "Set only the TCDn_CSR\\[START\\] bit specified in the SSRT field"]
1468 pub const SAST_0: u8 = 0;
1469 #[doc = "Set all bits in TCDn_CSR\\[START\\]"]
1470 pub const SAST_1: u8 = 0x01;
1471 }
1472 }
1473 #[doc = "No Op enable"]
1474 pub mod NOP {
1475 pub const offset: u8 = 7;
1476 pub const mask: u8 = 0x01 << offset;
1477 pub mod R {}
1478 pub mod W {}
1479 pub mod RW {
1480 #[doc = "Normal operation"]
1481 pub const NOP_0: u8 = 0;
1482 #[doc = "No operation, ignore the other bits in this register"]
1483 pub const NOP_1: u8 = 0x01;
1484 }
1485 }
1486}
1487#[doc = "Clear Error Register"]
1488pub mod CERR {
1489 #[doc = "Clear Error Indicator"]
1490 pub mod CERR {
1491 pub const offset: u8 = 0;
1492 pub const mask: u8 = 0x1f << offset;
1493 pub mod R {}
1494 pub mod W {}
1495 pub mod RW {}
1496 }
1497 #[doc = "Clear All Error Indicators"]
1498 pub mod CAEI {
1499 pub const offset: u8 = 6;
1500 pub const mask: u8 = 0x01 << offset;
1501 pub mod R {}
1502 pub mod W {}
1503 pub mod RW {
1504 #[doc = "Clear only the ERR bit specified in the CERR field"]
1505 pub const CAEI_0: u8 = 0;
1506 #[doc = "Clear all bits in ERR"]
1507 pub const CAEI_1: u8 = 0x01;
1508 }
1509 }
1510 #[doc = "No Op enable"]
1511 pub mod NOP {
1512 pub const offset: u8 = 7;
1513 pub const mask: u8 = 0x01 << offset;
1514 pub mod R {}
1515 pub mod W {}
1516 pub mod RW {
1517 #[doc = "Normal operation"]
1518 pub const NOP_0: u8 = 0;
1519 #[doc = "No operation, ignore the other bits in this register"]
1520 pub const NOP_1: u8 = 0x01;
1521 }
1522 }
1523}
1524#[doc = "Clear Interrupt Request Register"]
1525pub mod CINT {
1526 #[doc = "Clear Interrupt Request"]
1527 pub mod CINT {
1528 pub const offset: u8 = 0;
1529 pub const mask: u8 = 0x1f << offset;
1530 pub mod R {}
1531 pub mod W {}
1532 pub mod RW {}
1533 }
1534 #[doc = "Clear All Interrupt Requests"]
1535 pub mod CAIR {
1536 pub const offset: u8 = 6;
1537 pub const mask: u8 = 0x01 << offset;
1538 pub mod R {}
1539 pub mod W {}
1540 pub mod RW {
1541 #[doc = "Clear only the INT bit specified in the CINT field"]
1542 pub const CAIR_0: u8 = 0;
1543 #[doc = "Clear all bits in INT"]
1544 pub const CAIR_1: u8 = 0x01;
1545 }
1546 }
1547 #[doc = "No Op enable"]
1548 pub mod NOP {
1549 pub const offset: u8 = 7;
1550 pub const mask: u8 = 0x01 << offset;
1551 pub mod R {}
1552 pub mod W {}
1553 pub mod RW {
1554 #[doc = "Normal operation"]
1555 pub const NOP_0: u8 = 0;
1556 #[doc = "No operation, ignore the other bits in this register"]
1557 pub const NOP_1: u8 = 0x01;
1558 }
1559 }
1560}
1561#[doc = "Interrupt Request Register"]
1562pub mod INT {
1563 #[doc = "Interrupt Request 0"]
1564 pub mod INT0 {
1565 pub const offset: u32 = 0;
1566 pub const mask: u32 = 0x01 << offset;
1567 pub mod R {}
1568 pub mod W {}
1569 pub mod RW {
1570 #[doc = "The interrupt request for corresponding channel is cleared"]
1571 pub const INT0_0: u32 = 0;
1572 #[doc = "The interrupt request for corresponding channel is active"]
1573 pub const INT0_1: u32 = 0x01;
1574 }
1575 }
1576 #[doc = "Interrupt Request 1"]
1577 pub mod INT1 {
1578 pub const offset: u32 = 1;
1579 pub const mask: u32 = 0x01 << offset;
1580 pub mod R {}
1581 pub mod W {}
1582 pub mod RW {
1583 #[doc = "The interrupt request for corresponding channel is cleared"]
1584 pub const INT1_0: u32 = 0;
1585 #[doc = "The interrupt request for corresponding channel is active"]
1586 pub const INT1_1: u32 = 0x01;
1587 }
1588 }
1589 #[doc = "Interrupt Request 2"]
1590 pub mod INT2 {
1591 pub const offset: u32 = 2;
1592 pub const mask: u32 = 0x01 << offset;
1593 pub mod R {}
1594 pub mod W {}
1595 pub mod RW {
1596 #[doc = "The interrupt request for corresponding channel is cleared"]
1597 pub const INT2_0: u32 = 0;
1598 #[doc = "The interrupt request for corresponding channel is active"]
1599 pub const INT2_1: u32 = 0x01;
1600 }
1601 }
1602 #[doc = "Interrupt Request 3"]
1603 pub mod INT3 {
1604 pub const offset: u32 = 3;
1605 pub const mask: u32 = 0x01 << offset;
1606 pub mod R {}
1607 pub mod W {}
1608 pub mod RW {
1609 #[doc = "The interrupt request for corresponding channel is cleared"]
1610 pub const INT3_0: u32 = 0;
1611 #[doc = "The interrupt request for corresponding channel is active"]
1612 pub const INT3_1: u32 = 0x01;
1613 }
1614 }
1615 #[doc = "Interrupt Request 4"]
1616 pub mod INT4 {
1617 pub const offset: u32 = 4;
1618 pub const mask: u32 = 0x01 << offset;
1619 pub mod R {}
1620 pub mod W {}
1621 pub mod RW {
1622 #[doc = "The interrupt request for corresponding channel is cleared"]
1623 pub const INT4_0: u32 = 0;
1624 #[doc = "The interrupt request for corresponding channel is active"]
1625 pub const INT4_1: u32 = 0x01;
1626 }
1627 }
1628 #[doc = "Interrupt Request 5"]
1629 pub mod INT5 {
1630 pub const offset: u32 = 5;
1631 pub const mask: u32 = 0x01 << offset;
1632 pub mod R {}
1633 pub mod W {}
1634 pub mod RW {
1635 #[doc = "The interrupt request for corresponding channel is cleared"]
1636 pub const INT5_0: u32 = 0;
1637 #[doc = "The interrupt request for corresponding channel is active"]
1638 pub const INT5_1: u32 = 0x01;
1639 }
1640 }
1641 #[doc = "Interrupt Request 6"]
1642 pub mod INT6 {
1643 pub const offset: u32 = 6;
1644 pub const mask: u32 = 0x01 << offset;
1645 pub mod R {}
1646 pub mod W {}
1647 pub mod RW {
1648 #[doc = "The interrupt request for corresponding channel is cleared"]
1649 pub const INT6_0: u32 = 0;
1650 #[doc = "The interrupt request for corresponding channel is active"]
1651 pub const INT6_1: u32 = 0x01;
1652 }
1653 }
1654 #[doc = "Interrupt Request 7"]
1655 pub mod INT7 {
1656 pub const offset: u32 = 7;
1657 pub const mask: u32 = 0x01 << offset;
1658 pub mod R {}
1659 pub mod W {}
1660 pub mod RW {
1661 #[doc = "The interrupt request for corresponding channel is cleared"]
1662 pub const INT7_0: u32 = 0;
1663 #[doc = "The interrupt request for corresponding channel is active"]
1664 pub const INT7_1: u32 = 0x01;
1665 }
1666 }
1667 #[doc = "Interrupt Request 8"]
1668 pub mod INT8 {
1669 pub const offset: u32 = 8;
1670 pub const mask: u32 = 0x01 << offset;
1671 pub mod R {}
1672 pub mod W {}
1673 pub mod RW {
1674 #[doc = "The interrupt request for corresponding channel is cleared"]
1675 pub const INT8_0: u32 = 0;
1676 #[doc = "The interrupt request for corresponding channel is active"]
1677 pub const INT8_1: u32 = 0x01;
1678 }
1679 }
1680 #[doc = "Interrupt Request 9"]
1681 pub mod INT9 {
1682 pub const offset: u32 = 9;
1683 pub const mask: u32 = 0x01 << offset;
1684 pub mod R {}
1685 pub mod W {}
1686 pub mod RW {
1687 #[doc = "The interrupt request for corresponding channel is cleared"]
1688 pub const INT9_0: u32 = 0;
1689 #[doc = "The interrupt request for corresponding channel is active"]
1690 pub const INT9_1: u32 = 0x01;
1691 }
1692 }
1693 #[doc = "Interrupt Request 10"]
1694 pub mod INT10 {
1695 pub const offset: u32 = 10;
1696 pub const mask: u32 = 0x01 << offset;
1697 pub mod R {}
1698 pub mod W {}
1699 pub mod RW {
1700 #[doc = "The interrupt request for corresponding channel is cleared"]
1701 pub const INT10_0: u32 = 0;
1702 #[doc = "The interrupt request for corresponding channel is active"]
1703 pub const INT10_1: u32 = 0x01;
1704 }
1705 }
1706 #[doc = "Interrupt Request 11"]
1707 pub mod INT11 {
1708 pub const offset: u32 = 11;
1709 pub const mask: u32 = 0x01 << offset;
1710 pub mod R {}
1711 pub mod W {}
1712 pub mod RW {
1713 #[doc = "The interrupt request for corresponding channel is cleared"]
1714 pub const INT11_0: u32 = 0;
1715 #[doc = "The interrupt request for corresponding channel is active"]
1716 pub const INT11_1: u32 = 0x01;
1717 }
1718 }
1719 #[doc = "Interrupt Request 12"]
1720 pub mod INT12 {
1721 pub const offset: u32 = 12;
1722 pub const mask: u32 = 0x01 << offset;
1723 pub mod R {}
1724 pub mod W {}
1725 pub mod RW {
1726 #[doc = "The interrupt request for corresponding channel is cleared"]
1727 pub const INT12_0: u32 = 0;
1728 #[doc = "The interrupt request for corresponding channel is active"]
1729 pub const INT12_1: u32 = 0x01;
1730 }
1731 }
1732 #[doc = "Interrupt Request 13"]
1733 pub mod INT13 {
1734 pub const offset: u32 = 13;
1735 pub const mask: u32 = 0x01 << offset;
1736 pub mod R {}
1737 pub mod W {}
1738 pub mod RW {
1739 #[doc = "The interrupt request for corresponding channel is cleared"]
1740 pub const INT13_0: u32 = 0;
1741 #[doc = "The interrupt request for corresponding channel is active"]
1742 pub const INT13_1: u32 = 0x01;
1743 }
1744 }
1745 #[doc = "Interrupt Request 14"]
1746 pub mod INT14 {
1747 pub const offset: u32 = 14;
1748 pub const mask: u32 = 0x01 << offset;
1749 pub mod R {}
1750 pub mod W {}
1751 pub mod RW {
1752 #[doc = "The interrupt request for corresponding channel is cleared"]
1753 pub const INT14_0: u32 = 0;
1754 #[doc = "The interrupt request for corresponding channel is active"]
1755 pub const INT14_1: u32 = 0x01;
1756 }
1757 }
1758 #[doc = "Interrupt Request 15"]
1759 pub mod INT15 {
1760 pub const offset: u32 = 15;
1761 pub const mask: u32 = 0x01 << offset;
1762 pub mod R {}
1763 pub mod W {}
1764 pub mod RW {
1765 #[doc = "The interrupt request for corresponding channel is cleared"]
1766 pub const INT15_0: u32 = 0;
1767 #[doc = "The interrupt request for corresponding channel is active"]
1768 pub const INT15_1: u32 = 0x01;
1769 }
1770 }
1771 #[doc = "Interrupt Request 16"]
1772 pub mod INT16 {
1773 pub const offset: u32 = 16;
1774 pub const mask: u32 = 0x01 << offset;
1775 pub mod R {}
1776 pub mod W {}
1777 pub mod RW {
1778 #[doc = "The interrupt request for corresponding channel is cleared"]
1779 pub const INT16_0: u32 = 0;
1780 #[doc = "The interrupt request for corresponding channel is active"]
1781 pub const INT16_1: u32 = 0x01;
1782 }
1783 }
1784 #[doc = "Interrupt Request 17"]
1785 pub mod INT17 {
1786 pub const offset: u32 = 17;
1787 pub const mask: u32 = 0x01 << offset;
1788 pub mod R {}
1789 pub mod W {}
1790 pub mod RW {
1791 #[doc = "The interrupt request for corresponding channel is cleared"]
1792 pub const INT17_0: u32 = 0;
1793 #[doc = "The interrupt request for corresponding channel is active"]
1794 pub const INT17_1: u32 = 0x01;
1795 }
1796 }
1797 #[doc = "Interrupt Request 18"]
1798 pub mod INT18 {
1799 pub const offset: u32 = 18;
1800 pub const mask: u32 = 0x01 << offset;
1801 pub mod R {}
1802 pub mod W {}
1803 pub mod RW {
1804 #[doc = "The interrupt request for corresponding channel is cleared"]
1805 pub const INT18_0: u32 = 0;
1806 #[doc = "The interrupt request for corresponding channel is active"]
1807 pub const INT18_1: u32 = 0x01;
1808 }
1809 }
1810 #[doc = "Interrupt Request 19"]
1811 pub mod INT19 {
1812 pub const offset: u32 = 19;
1813 pub const mask: u32 = 0x01 << offset;
1814 pub mod R {}
1815 pub mod W {}
1816 pub mod RW {
1817 #[doc = "The interrupt request for corresponding channel is cleared"]
1818 pub const INT19_0: u32 = 0;
1819 #[doc = "The interrupt request for corresponding channel is active"]
1820 pub const INT19_1: u32 = 0x01;
1821 }
1822 }
1823 #[doc = "Interrupt Request 20"]
1824 pub mod INT20 {
1825 pub const offset: u32 = 20;
1826 pub const mask: u32 = 0x01 << offset;
1827 pub mod R {}
1828 pub mod W {}
1829 pub mod RW {
1830 #[doc = "The interrupt request for corresponding channel is cleared"]
1831 pub const INT20_0: u32 = 0;
1832 #[doc = "The interrupt request for corresponding channel is active"]
1833 pub const INT20_1: u32 = 0x01;
1834 }
1835 }
1836 #[doc = "Interrupt Request 21"]
1837 pub mod INT21 {
1838 pub const offset: u32 = 21;
1839 pub const mask: u32 = 0x01 << offset;
1840 pub mod R {}
1841 pub mod W {}
1842 pub mod RW {
1843 #[doc = "The interrupt request for corresponding channel is cleared"]
1844 pub const INT21_0: u32 = 0;
1845 #[doc = "The interrupt request for corresponding channel is active"]
1846 pub const INT21_1: u32 = 0x01;
1847 }
1848 }
1849 #[doc = "Interrupt Request 22"]
1850 pub mod INT22 {
1851 pub const offset: u32 = 22;
1852 pub const mask: u32 = 0x01 << offset;
1853 pub mod R {}
1854 pub mod W {}
1855 pub mod RW {
1856 #[doc = "The interrupt request for corresponding channel is cleared"]
1857 pub const INT22_0: u32 = 0;
1858 #[doc = "The interrupt request for corresponding channel is active"]
1859 pub const INT22_1: u32 = 0x01;
1860 }
1861 }
1862 #[doc = "Interrupt Request 23"]
1863 pub mod INT23 {
1864 pub const offset: u32 = 23;
1865 pub const mask: u32 = 0x01 << offset;
1866 pub mod R {}
1867 pub mod W {}
1868 pub mod RW {
1869 #[doc = "The interrupt request for corresponding channel is cleared"]
1870 pub const INT23_0: u32 = 0;
1871 #[doc = "The interrupt request for corresponding channel is active"]
1872 pub const INT23_1: u32 = 0x01;
1873 }
1874 }
1875 #[doc = "Interrupt Request 24"]
1876 pub mod INT24 {
1877 pub const offset: u32 = 24;
1878 pub const mask: u32 = 0x01 << offset;
1879 pub mod R {}
1880 pub mod W {}
1881 pub mod RW {
1882 #[doc = "The interrupt request for corresponding channel is cleared"]
1883 pub const INT24_0: u32 = 0;
1884 #[doc = "The interrupt request for corresponding channel is active"]
1885 pub const INT24_1: u32 = 0x01;
1886 }
1887 }
1888 #[doc = "Interrupt Request 25"]
1889 pub mod INT25 {
1890 pub const offset: u32 = 25;
1891 pub const mask: u32 = 0x01 << offset;
1892 pub mod R {}
1893 pub mod W {}
1894 pub mod RW {
1895 #[doc = "The interrupt request for corresponding channel is cleared"]
1896 pub const INT25_0: u32 = 0;
1897 #[doc = "The interrupt request for corresponding channel is active"]
1898 pub const INT25_1: u32 = 0x01;
1899 }
1900 }
1901 #[doc = "Interrupt Request 26"]
1902 pub mod INT26 {
1903 pub const offset: u32 = 26;
1904 pub const mask: u32 = 0x01 << offset;
1905 pub mod R {}
1906 pub mod W {}
1907 pub mod RW {
1908 #[doc = "The interrupt request for corresponding channel is cleared"]
1909 pub const INT26_0: u32 = 0;
1910 #[doc = "The interrupt request for corresponding channel is active"]
1911 pub const INT26_1: u32 = 0x01;
1912 }
1913 }
1914 #[doc = "Interrupt Request 27"]
1915 pub mod INT27 {
1916 pub const offset: u32 = 27;
1917 pub const mask: u32 = 0x01 << offset;
1918 pub mod R {}
1919 pub mod W {}
1920 pub mod RW {
1921 #[doc = "The interrupt request for corresponding channel is cleared"]
1922 pub const INT27_0: u32 = 0;
1923 #[doc = "The interrupt request for corresponding channel is active"]
1924 pub const INT27_1: u32 = 0x01;
1925 }
1926 }
1927 #[doc = "Interrupt Request 28"]
1928 pub mod INT28 {
1929 pub const offset: u32 = 28;
1930 pub const mask: u32 = 0x01 << offset;
1931 pub mod R {}
1932 pub mod W {}
1933 pub mod RW {
1934 #[doc = "The interrupt request for corresponding channel is cleared"]
1935 pub const INT28_0: u32 = 0;
1936 #[doc = "The interrupt request for corresponding channel is active"]
1937 pub const INT28_1: u32 = 0x01;
1938 }
1939 }
1940 #[doc = "Interrupt Request 29"]
1941 pub mod INT29 {
1942 pub const offset: u32 = 29;
1943 pub const mask: u32 = 0x01 << offset;
1944 pub mod R {}
1945 pub mod W {}
1946 pub mod RW {
1947 #[doc = "The interrupt request for corresponding channel is cleared"]
1948 pub const INT29_0: u32 = 0;
1949 #[doc = "The interrupt request for corresponding channel is active"]
1950 pub const INT29_1: u32 = 0x01;
1951 }
1952 }
1953 #[doc = "Interrupt Request 30"]
1954 pub mod INT30 {
1955 pub const offset: u32 = 30;
1956 pub const mask: u32 = 0x01 << offset;
1957 pub mod R {}
1958 pub mod W {}
1959 pub mod RW {
1960 #[doc = "The interrupt request for corresponding channel is cleared"]
1961 pub const INT30_0: u32 = 0;
1962 #[doc = "The interrupt request for corresponding channel is active"]
1963 pub const INT30_1: u32 = 0x01;
1964 }
1965 }
1966 #[doc = "Interrupt Request 31"]
1967 pub mod INT31 {
1968 pub const offset: u32 = 31;
1969 pub const mask: u32 = 0x01 << offset;
1970 pub mod R {}
1971 pub mod W {}
1972 pub mod RW {
1973 #[doc = "The interrupt request for corresponding channel is cleared"]
1974 pub const INT31_0: u32 = 0;
1975 #[doc = "The interrupt request for corresponding channel is active"]
1976 pub const INT31_1: u32 = 0x01;
1977 }
1978 }
1979}
1980#[doc = "Error Register"]
1981pub mod ERR {
1982 #[doc = "Error In Channel 0"]
1983 pub mod ERR0 {
1984 pub const offset: u32 = 0;
1985 pub const mask: u32 = 0x01 << offset;
1986 pub mod R {}
1987 pub mod W {}
1988 pub mod RW {
1989 #[doc = "An error in this channel has not occurred"]
1990 pub const ERR0_0: u32 = 0;
1991 #[doc = "An error in this channel has occurred"]
1992 pub const ERR0_1: u32 = 0x01;
1993 }
1994 }
1995 #[doc = "Error In Channel 1"]
1996 pub mod ERR1 {
1997 pub const offset: u32 = 1;
1998 pub const mask: u32 = 0x01 << offset;
1999 pub mod R {}
2000 pub mod W {}
2001 pub mod RW {
2002 #[doc = "An error in this channel has not occurred"]
2003 pub const ERR1_0: u32 = 0;
2004 #[doc = "An error in this channel has occurred"]
2005 pub const ERR1_1: u32 = 0x01;
2006 }
2007 }
2008 #[doc = "Error In Channel 2"]
2009 pub mod ERR2 {
2010 pub const offset: u32 = 2;
2011 pub const mask: u32 = 0x01 << offset;
2012 pub mod R {}
2013 pub mod W {}
2014 pub mod RW {
2015 #[doc = "An error in this channel has not occurred"]
2016 pub const ERR2_0: u32 = 0;
2017 #[doc = "An error in this channel has occurred"]
2018 pub const ERR2_1: u32 = 0x01;
2019 }
2020 }
2021 #[doc = "Error In Channel 3"]
2022 pub mod ERR3 {
2023 pub const offset: u32 = 3;
2024 pub const mask: u32 = 0x01 << offset;
2025 pub mod R {}
2026 pub mod W {}
2027 pub mod RW {
2028 #[doc = "An error in this channel has not occurred"]
2029 pub const ERR3_0: u32 = 0;
2030 #[doc = "An error in this channel has occurred"]
2031 pub const ERR3_1: u32 = 0x01;
2032 }
2033 }
2034 #[doc = "Error In Channel 4"]
2035 pub mod ERR4 {
2036 pub const offset: u32 = 4;
2037 pub const mask: u32 = 0x01 << offset;
2038 pub mod R {}
2039 pub mod W {}
2040 pub mod RW {
2041 #[doc = "An error in this channel has not occurred"]
2042 pub const ERR4_0: u32 = 0;
2043 #[doc = "An error in this channel has occurred"]
2044 pub const ERR4_1: u32 = 0x01;
2045 }
2046 }
2047 #[doc = "Error In Channel 5"]
2048 pub mod ERR5 {
2049 pub const offset: u32 = 5;
2050 pub const mask: u32 = 0x01 << offset;
2051 pub mod R {}
2052 pub mod W {}
2053 pub mod RW {
2054 #[doc = "An error in this channel has not occurred"]
2055 pub const ERR5_0: u32 = 0;
2056 #[doc = "An error in this channel has occurred"]
2057 pub const ERR5_1: u32 = 0x01;
2058 }
2059 }
2060 #[doc = "Error In Channel 6"]
2061 pub mod ERR6 {
2062 pub const offset: u32 = 6;
2063 pub const mask: u32 = 0x01 << offset;
2064 pub mod R {}
2065 pub mod W {}
2066 pub mod RW {
2067 #[doc = "An error in this channel has not occurred"]
2068 pub const ERR6_0: u32 = 0;
2069 #[doc = "An error in this channel has occurred"]
2070 pub const ERR6_1: u32 = 0x01;
2071 }
2072 }
2073 #[doc = "Error In Channel 7"]
2074 pub mod ERR7 {
2075 pub const offset: u32 = 7;
2076 pub const mask: u32 = 0x01 << offset;
2077 pub mod R {}
2078 pub mod W {}
2079 pub mod RW {
2080 #[doc = "An error in this channel has not occurred"]
2081 pub const ERR7_0: u32 = 0;
2082 #[doc = "An error in this channel has occurred"]
2083 pub const ERR7_1: u32 = 0x01;
2084 }
2085 }
2086 #[doc = "Error In Channel 8"]
2087 pub mod ERR8 {
2088 pub const offset: u32 = 8;
2089 pub const mask: u32 = 0x01 << offset;
2090 pub mod R {}
2091 pub mod W {}
2092 pub mod RW {
2093 #[doc = "An error in this channel has not occurred"]
2094 pub const ERR8_0: u32 = 0;
2095 #[doc = "An error in this channel has occurred"]
2096 pub const ERR8_1: u32 = 0x01;
2097 }
2098 }
2099 #[doc = "Error In Channel 9"]
2100 pub mod ERR9 {
2101 pub const offset: u32 = 9;
2102 pub const mask: u32 = 0x01 << offset;
2103 pub mod R {}
2104 pub mod W {}
2105 pub mod RW {
2106 #[doc = "An error in this channel has not occurred"]
2107 pub const ERR9_0: u32 = 0;
2108 #[doc = "An error in this channel has occurred"]
2109 pub const ERR9_1: u32 = 0x01;
2110 }
2111 }
2112 #[doc = "Error In Channel 10"]
2113 pub mod ERR10 {
2114 pub const offset: u32 = 10;
2115 pub const mask: u32 = 0x01 << offset;
2116 pub mod R {}
2117 pub mod W {}
2118 pub mod RW {
2119 #[doc = "An error in this channel has not occurred"]
2120 pub const ERR10_0: u32 = 0;
2121 #[doc = "An error in this channel has occurred"]
2122 pub const ERR10_1: u32 = 0x01;
2123 }
2124 }
2125 #[doc = "Error In Channel 11"]
2126 pub mod ERR11 {
2127 pub const offset: u32 = 11;
2128 pub const mask: u32 = 0x01 << offset;
2129 pub mod R {}
2130 pub mod W {}
2131 pub mod RW {
2132 #[doc = "An error in this channel has not occurred"]
2133 pub const ERR11_0: u32 = 0;
2134 #[doc = "An error in this channel has occurred"]
2135 pub const ERR11_1: u32 = 0x01;
2136 }
2137 }
2138 #[doc = "Error In Channel 12"]
2139 pub mod ERR12 {
2140 pub const offset: u32 = 12;
2141 pub const mask: u32 = 0x01 << offset;
2142 pub mod R {}
2143 pub mod W {}
2144 pub mod RW {
2145 #[doc = "An error in this channel has not occurred"]
2146 pub const ERR12_0: u32 = 0;
2147 #[doc = "An error in this channel has occurred"]
2148 pub const ERR12_1: u32 = 0x01;
2149 }
2150 }
2151 #[doc = "Error In Channel 13"]
2152 pub mod ERR13 {
2153 pub const offset: u32 = 13;
2154 pub const mask: u32 = 0x01 << offset;
2155 pub mod R {}
2156 pub mod W {}
2157 pub mod RW {
2158 #[doc = "An error in this channel has not occurred"]
2159 pub const ERR13_0: u32 = 0;
2160 #[doc = "An error in this channel has occurred"]
2161 pub const ERR13_1: u32 = 0x01;
2162 }
2163 }
2164 #[doc = "Error In Channel 14"]
2165 pub mod ERR14 {
2166 pub const offset: u32 = 14;
2167 pub const mask: u32 = 0x01 << offset;
2168 pub mod R {}
2169 pub mod W {}
2170 pub mod RW {
2171 #[doc = "An error in this channel has not occurred"]
2172 pub const ERR14_0: u32 = 0;
2173 #[doc = "An error in this channel has occurred"]
2174 pub const ERR14_1: u32 = 0x01;
2175 }
2176 }
2177 #[doc = "Error In Channel 15"]
2178 pub mod ERR15 {
2179 pub const offset: u32 = 15;
2180 pub const mask: u32 = 0x01 << offset;
2181 pub mod R {}
2182 pub mod W {}
2183 pub mod RW {
2184 #[doc = "An error in this channel has not occurred"]
2185 pub const ERR15_0: u32 = 0;
2186 #[doc = "An error in this channel has occurred"]
2187 pub const ERR15_1: u32 = 0x01;
2188 }
2189 }
2190 #[doc = "Error In Channel 16"]
2191 pub mod ERR16 {
2192 pub const offset: u32 = 16;
2193 pub const mask: u32 = 0x01 << offset;
2194 pub mod R {}
2195 pub mod W {}
2196 pub mod RW {
2197 #[doc = "An error in this channel has not occurred"]
2198 pub const ERR16_0: u32 = 0;
2199 #[doc = "An error in this channel has occurred"]
2200 pub const ERR16_1: u32 = 0x01;
2201 }
2202 }
2203 #[doc = "Error In Channel 17"]
2204 pub mod ERR17 {
2205 pub const offset: u32 = 17;
2206 pub const mask: u32 = 0x01 << offset;
2207 pub mod R {}
2208 pub mod W {}
2209 pub mod RW {
2210 #[doc = "An error in this channel has not occurred"]
2211 pub const ERR17_0: u32 = 0;
2212 #[doc = "An error in this channel has occurred"]
2213 pub const ERR17_1: u32 = 0x01;
2214 }
2215 }
2216 #[doc = "Error In Channel 18"]
2217 pub mod ERR18 {
2218 pub const offset: u32 = 18;
2219 pub const mask: u32 = 0x01 << offset;
2220 pub mod R {}
2221 pub mod W {}
2222 pub mod RW {
2223 #[doc = "An error in this channel has not occurred"]
2224 pub const ERR18_0: u32 = 0;
2225 #[doc = "An error in this channel has occurred"]
2226 pub const ERR18_1: u32 = 0x01;
2227 }
2228 }
2229 #[doc = "Error In Channel 19"]
2230 pub mod ERR19 {
2231 pub const offset: u32 = 19;
2232 pub const mask: u32 = 0x01 << offset;
2233 pub mod R {}
2234 pub mod W {}
2235 pub mod RW {
2236 #[doc = "An error in this channel has not occurred"]
2237 pub const ERR19_0: u32 = 0;
2238 #[doc = "An error in this channel has occurred"]
2239 pub const ERR19_1: u32 = 0x01;
2240 }
2241 }
2242 #[doc = "Error In Channel 20"]
2243 pub mod ERR20 {
2244 pub const offset: u32 = 20;
2245 pub const mask: u32 = 0x01 << offset;
2246 pub mod R {}
2247 pub mod W {}
2248 pub mod RW {
2249 #[doc = "An error in this channel has not occurred"]
2250 pub const ERR20_0: u32 = 0;
2251 #[doc = "An error in this channel has occurred"]
2252 pub const ERR20_1: u32 = 0x01;
2253 }
2254 }
2255 #[doc = "Error In Channel 21"]
2256 pub mod ERR21 {
2257 pub const offset: u32 = 21;
2258 pub const mask: u32 = 0x01 << offset;
2259 pub mod R {}
2260 pub mod W {}
2261 pub mod RW {
2262 #[doc = "An error in this channel has not occurred"]
2263 pub const ERR21_0: u32 = 0;
2264 #[doc = "An error in this channel has occurred"]
2265 pub const ERR21_1: u32 = 0x01;
2266 }
2267 }
2268 #[doc = "Error In Channel 22"]
2269 pub mod ERR22 {
2270 pub const offset: u32 = 22;
2271 pub const mask: u32 = 0x01 << offset;
2272 pub mod R {}
2273 pub mod W {}
2274 pub mod RW {
2275 #[doc = "An error in this channel has not occurred"]
2276 pub const ERR22_0: u32 = 0;
2277 #[doc = "An error in this channel has occurred"]
2278 pub const ERR22_1: u32 = 0x01;
2279 }
2280 }
2281 #[doc = "Error In Channel 23"]
2282 pub mod ERR23 {
2283 pub const offset: u32 = 23;
2284 pub const mask: u32 = 0x01 << offset;
2285 pub mod R {}
2286 pub mod W {}
2287 pub mod RW {
2288 #[doc = "An error in this channel has not occurred"]
2289 pub const ERR23_0: u32 = 0;
2290 #[doc = "An error in this channel has occurred"]
2291 pub const ERR23_1: u32 = 0x01;
2292 }
2293 }
2294 #[doc = "Error In Channel 24"]
2295 pub mod ERR24 {
2296 pub const offset: u32 = 24;
2297 pub const mask: u32 = 0x01 << offset;
2298 pub mod R {}
2299 pub mod W {}
2300 pub mod RW {
2301 #[doc = "An error in this channel has not occurred"]
2302 pub const ERR24_0: u32 = 0;
2303 #[doc = "An error in this channel has occurred"]
2304 pub const ERR24_1: u32 = 0x01;
2305 }
2306 }
2307 #[doc = "Error In Channel 25"]
2308 pub mod ERR25 {
2309 pub const offset: u32 = 25;
2310 pub const mask: u32 = 0x01 << offset;
2311 pub mod R {}
2312 pub mod W {}
2313 pub mod RW {
2314 #[doc = "An error in this channel has not occurred"]
2315 pub const ERR25_0: u32 = 0;
2316 #[doc = "An error in this channel has occurred"]
2317 pub const ERR25_1: u32 = 0x01;
2318 }
2319 }
2320 #[doc = "Error In Channel 26"]
2321 pub mod ERR26 {
2322 pub const offset: u32 = 26;
2323 pub const mask: u32 = 0x01 << offset;
2324 pub mod R {}
2325 pub mod W {}
2326 pub mod RW {
2327 #[doc = "An error in this channel has not occurred"]
2328 pub const ERR26_0: u32 = 0;
2329 #[doc = "An error in this channel has occurred"]
2330 pub const ERR26_1: u32 = 0x01;
2331 }
2332 }
2333 #[doc = "Error In Channel 27"]
2334 pub mod ERR27 {
2335 pub const offset: u32 = 27;
2336 pub const mask: u32 = 0x01 << offset;
2337 pub mod R {}
2338 pub mod W {}
2339 pub mod RW {
2340 #[doc = "An error in this channel has not occurred"]
2341 pub const ERR27_0: u32 = 0;
2342 #[doc = "An error in this channel has occurred"]
2343 pub const ERR27_1: u32 = 0x01;
2344 }
2345 }
2346 #[doc = "Error In Channel 28"]
2347 pub mod ERR28 {
2348 pub const offset: u32 = 28;
2349 pub const mask: u32 = 0x01 << offset;
2350 pub mod R {}
2351 pub mod W {}
2352 pub mod RW {
2353 #[doc = "An error in this channel has not occurred"]
2354 pub const ERR28_0: u32 = 0;
2355 #[doc = "An error in this channel has occurred"]
2356 pub const ERR28_1: u32 = 0x01;
2357 }
2358 }
2359 #[doc = "Error In Channel 29"]
2360 pub mod ERR29 {
2361 pub const offset: u32 = 29;
2362 pub const mask: u32 = 0x01 << offset;
2363 pub mod R {}
2364 pub mod W {}
2365 pub mod RW {
2366 #[doc = "An error in this channel has not occurred"]
2367 pub const ERR29_0: u32 = 0;
2368 #[doc = "An error in this channel has occurred"]
2369 pub const ERR29_1: u32 = 0x01;
2370 }
2371 }
2372 #[doc = "Error In Channel 30"]
2373 pub mod ERR30 {
2374 pub const offset: u32 = 30;
2375 pub const mask: u32 = 0x01 << offset;
2376 pub mod R {}
2377 pub mod W {}
2378 pub mod RW {
2379 #[doc = "An error in this channel has not occurred"]
2380 pub const ERR30_0: u32 = 0;
2381 #[doc = "An error in this channel has occurred"]
2382 pub const ERR30_1: u32 = 0x01;
2383 }
2384 }
2385 #[doc = "Error In Channel 31"]
2386 pub mod ERR31 {
2387 pub const offset: u32 = 31;
2388 pub const mask: u32 = 0x01 << offset;
2389 pub mod R {}
2390 pub mod W {}
2391 pub mod RW {
2392 #[doc = "An error in this channel has not occurred"]
2393 pub const ERR31_0: u32 = 0;
2394 #[doc = "An error in this channel has occurred"]
2395 pub const ERR31_1: u32 = 0x01;
2396 }
2397 }
2398}
2399#[doc = "Hardware Request Status Register"]
2400pub mod HRS {
2401 #[doc = "Hardware Request Status Channel 0"]
2402 pub mod HRS0 {
2403 pub const offset: u32 = 0;
2404 pub const mask: u32 = 0x01 << offset;
2405 pub mod R {}
2406 pub mod W {}
2407 pub mod RW {
2408 #[doc = "A hardware service request for channel 0 is not present"]
2409 pub const HRS0_0: u32 = 0;
2410 #[doc = "A hardware service request for channel 0 is present"]
2411 pub const HRS0_1: u32 = 0x01;
2412 }
2413 }
2414 #[doc = "Hardware Request Status Channel 1"]
2415 pub mod HRS1 {
2416 pub const offset: u32 = 1;
2417 pub const mask: u32 = 0x01 << offset;
2418 pub mod R {}
2419 pub mod W {}
2420 pub mod RW {
2421 #[doc = "A hardware service request for channel 1 is not present"]
2422 pub const HRS1_0: u32 = 0;
2423 #[doc = "A hardware service request for channel 1 is present"]
2424 pub const HRS1_1: u32 = 0x01;
2425 }
2426 }
2427 #[doc = "Hardware Request Status Channel 2"]
2428 pub mod HRS2 {
2429 pub const offset: u32 = 2;
2430 pub const mask: u32 = 0x01 << offset;
2431 pub mod R {}
2432 pub mod W {}
2433 pub mod RW {
2434 #[doc = "A hardware service request for channel 2 is not present"]
2435 pub const HRS2_0: u32 = 0;
2436 #[doc = "A hardware service request for channel 2 is present"]
2437 pub const HRS2_1: u32 = 0x01;
2438 }
2439 }
2440 #[doc = "Hardware Request Status Channel 3"]
2441 pub mod HRS3 {
2442 pub const offset: u32 = 3;
2443 pub const mask: u32 = 0x01 << offset;
2444 pub mod R {}
2445 pub mod W {}
2446 pub mod RW {
2447 #[doc = "A hardware service request for channel 3 is not present"]
2448 pub const HRS3_0: u32 = 0;
2449 #[doc = "A hardware service request for channel 3 is present"]
2450 pub const HRS3_1: u32 = 0x01;
2451 }
2452 }
2453 #[doc = "Hardware Request Status Channel 4"]
2454 pub mod HRS4 {
2455 pub const offset: u32 = 4;
2456 pub const mask: u32 = 0x01 << offset;
2457 pub mod R {}
2458 pub mod W {}
2459 pub mod RW {
2460 #[doc = "A hardware service request for channel 4 is not present"]
2461 pub const HRS4_0: u32 = 0;
2462 #[doc = "A hardware service request for channel 4 is present"]
2463 pub const HRS4_1: u32 = 0x01;
2464 }
2465 }
2466 #[doc = "Hardware Request Status Channel 5"]
2467 pub mod HRS5 {
2468 pub const offset: u32 = 5;
2469 pub const mask: u32 = 0x01 << offset;
2470 pub mod R {}
2471 pub mod W {}
2472 pub mod RW {
2473 #[doc = "A hardware service request for channel 5 is not present"]
2474 pub const HRS5_0: u32 = 0;
2475 #[doc = "A hardware service request for channel 5 is present"]
2476 pub const HRS5_1: u32 = 0x01;
2477 }
2478 }
2479 #[doc = "Hardware Request Status Channel 6"]
2480 pub mod HRS6 {
2481 pub const offset: u32 = 6;
2482 pub const mask: u32 = 0x01 << offset;
2483 pub mod R {}
2484 pub mod W {}
2485 pub mod RW {
2486 #[doc = "A hardware service request for channel 6 is not present"]
2487 pub const HRS6_0: u32 = 0;
2488 #[doc = "A hardware service request for channel 6 is present"]
2489 pub const HRS6_1: u32 = 0x01;
2490 }
2491 }
2492 #[doc = "Hardware Request Status Channel 7"]
2493 pub mod HRS7 {
2494 pub const offset: u32 = 7;
2495 pub const mask: u32 = 0x01 << offset;
2496 pub mod R {}
2497 pub mod W {}
2498 pub mod RW {
2499 #[doc = "A hardware service request for channel 7 is not present"]
2500 pub const HRS7_0: u32 = 0;
2501 #[doc = "A hardware service request for channel 7 is present"]
2502 pub const HRS7_1: u32 = 0x01;
2503 }
2504 }
2505 #[doc = "Hardware Request Status Channel 8"]
2506 pub mod HRS8 {
2507 pub const offset: u32 = 8;
2508 pub const mask: u32 = 0x01 << offset;
2509 pub mod R {}
2510 pub mod W {}
2511 pub mod RW {
2512 #[doc = "A hardware service request for channel 8 is not present"]
2513 pub const HRS8_0: u32 = 0;
2514 #[doc = "A hardware service request for channel 8 is present"]
2515 pub const HRS8_1: u32 = 0x01;
2516 }
2517 }
2518 #[doc = "Hardware Request Status Channel 9"]
2519 pub mod HRS9 {
2520 pub const offset: u32 = 9;
2521 pub const mask: u32 = 0x01 << offset;
2522 pub mod R {}
2523 pub mod W {}
2524 pub mod RW {
2525 #[doc = "A hardware service request for channel 9 is not present"]
2526 pub const HRS9_0: u32 = 0;
2527 #[doc = "A hardware service request for channel 9 is present"]
2528 pub const HRS9_1: u32 = 0x01;
2529 }
2530 }
2531 #[doc = "Hardware Request Status Channel 10"]
2532 pub mod HRS10 {
2533 pub const offset: u32 = 10;
2534 pub const mask: u32 = 0x01 << offset;
2535 pub mod R {}
2536 pub mod W {}
2537 pub mod RW {
2538 #[doc = "A hardware service request for channel 10 is not present"]
2539 pub const HRS10_0: u32 = 0;
2540 #[doc = "A hardware service request for channel 10 is present"]
2541 pub const HRS10_1: u32 = 0x01;
2542 }
2543 }
2544 #[doc = "Hardware Request Status Channel 11"]
2545 pub mod HRS11 {
2546 pub const offset: u32 = 11;
2547 pub const mask: u32 = 0x01 << offset;
2548 pub mod R {}
2549 pub mod W {}
2550 pub mod RW {
2551 #[doc = "A hardware service request for channel 11 is not present"]
2552 pub const HRS11_0: u32 = 0;
2553 #[doc = "A hardware service request for channel 11 is present"]
2554 pub const HRS11_1: u32 = 0x01;
2555 }
2556 }
2557 #[doc = "Hardware Request Status Channel 12"]
2558 pub mod HRS12 {
2559 pub const offset: u32 = 12;
2560 pub const mask: u32 = 0x01 << offset;
2561 pub mod R {}
2562 pub mod W {}
2563 pub mod RW {
2564 #[doc = "A hardware service request for channel 12 is not present"]
2565 pub const HRS12_0: u32 = 0;
2566 #[doc = "A hardware service request for channel 12 is present"]
2567 pub const HRS12_1: u32 = 0x01;
2568 }
2569 }
2570 #[doc = "Hardware Request Status Channel 13"]
2571 pub mod HRS13 {
2572 pub const offset: u32 = 13;
2573 pub const mask: u32 = 0x01 << offset;
2574 pub mod R {}
2575 pub mod W {}
2576 pub mod RW {
2577 #[doc = "A hardware service request for channel 13 is not present"]
2578 pub const HRS13_0: u32 = 0;
2579 #[doc = "A hardware service request for channel 13 is present"]
2580 pub const HRS13_1: u32 = 0x01;
2581 }
2582 }
2583 #[doc = "Hardware Request Status Channel 14"]
2584 pub mod HRS14 {
2585 pub const offset: u32 = 14;
2586 pub const mask: u32 = 0x01 << offset;
2587 pub mod R {}
2588 pub mod W {}
2589 pub mod RW {
2590 #[doc = "A hardware service request for channel 14 is not present"]
2591 pub const HRS14_0: u32 = 0;
2592 #[doc = "A hardware service request for channel 14 is present"]
2593 pub const HRS14_1: u32 = 0x01;
2594 }
2595 }
2596 #[doc = "Hardware Request Status Channel 15"]
2597 pub mod HRS15 {
2598 pub const offset: u32 = 15;
2599 pub const mask: u32 = 0x01 << offset;
2600 pub mod R {}
2601 pub mod W {}
2602 pub mod RW {
2603 #[doc = "A hardware service request for channel 15 is not present"]
2604 pub const HRS15_0: u32 = 0;
2605 #[doc = "A hardware service request for channel 15 is present"]
2606 pub const HRS15_1: u32 = 0x01;
2607 }
2608 }
2609 #[doc = "Hardware Request Status Channel 16"]
2610 pub mod HRS16 {
2611 pub const offset: u32 = 16;
2612 pub const mask: u32 = 0x01 << offset;
2613 pub mod R {}
2614 pub mod W {}
2615 pub mod RW {
2616 #[doc = "A hardware service request for channel 16 is not present"]
2617 pub const HRS16_0: u32 = 0;
2618 #[doc = "A hardware service request for channel 16 is present"]
2619 pub const HRS16_1: u32 = 0x01;
2620 }
2621 }
2622 #[doc = "Hardware Request Status Channel 17"]
2623 pub mod HRS17 {
2624 pub const offset: u32 = 17;
2625 pub const mask: u32 = 0x01 << offset;
2626 pub mod R {}
2627 pub mod W {}
2628 pub mod RW {
2629 #[doc = "A hardware service request for channel 17 is not present"]
2630 pub const HRS17_0: u32 = 0;
2631 #[doc = "A hardware service request for channel 17 is present"]
2632 pub const HRS17_1: u32 = 0x01;
2633 }
2634 }
2635 #[doc = "Hardware Request Status Channel 18"]
2636 pub mod HRS18 {
2637 pub const offset: u32 = 18;
2638 pub const mask: u32 = 0x01 << offset;
2639 pub mod R {}
2640 pub mod W {}
2641 pub mod RW {
2642 #[doc = "A hardware service request for channel 18 is not present"]
2643 pub const HRS18_0: u32 = 0;
2644 #[doc = "A hardware service request for channel 18 is present"]
2645 pub const HRS18_1: u32 = 0x01;
2646 }
2647 }
2648 #[doc = "Hardware Request Status Channel 19"]
2649 pub mod HRS19 {
2650 pub const offset: u32 = 19;
2651 pub const mask: u32 = 0x01 << offset;
2652 pub mod R {}
2653 pub mod W {}
2654 pub mod RW {
2655 #[doc = "A hardware service request for channel 19 is not present"]
2656 pub const HRS19_0: u32 = 0;
2657 #[doc = "A hardware service request for channel 19 is present"]
2658 pub const HRS19_1: u32 = 0x01;
2659 }
2660 }
2661 #[doc = "Hardware Request Status Channel 20"]
2662 pub mod HRS20 {
2663 pub const offset: u32 = 20;
2664 pub const mask: u32 = 0x01 << offset;
2665 pub mod R {}
2666 pub mod W {}
2667 pub mod RW {
2668 #[doc = "A hardware service request for channel 20 is not present"]
2669 pub const HRS20_0: u32 = 0;
2670 #[doc = "A hardware service request for channel 20 is present"]
2671 pub const HRS20_1: u32 = 0x01;
2672 }
2673 }
2674 #[doc = "Hardware Request Status Channel 21"]
2675 pub mod HRS21 {
2676 pub const offset: u32 = 21;
2677 pub const mask: u32 = 0x01 << offset;
2678 pub mod R {}
2679 pub mod W {}
2680 pub mod RW {
2681 #[doc = "A hardware service request for channel 21 is not present"]
2682 pub const HRS21_0: u32 = 0;
2683 #[doc = "A hardware service request for channel 21 is present"]
2684 pub const HRS21_1: u32 = 0x01;
2685 }
2686 }
2687 #[doc = "Hardware Request Status Channel 22"]
2688 pub mod HRS22 {
2689 pub const offset: u32 = 22;
2690 pub const mask: u32 = 0x01 << offset;
2691 pub mod R {}
2692 pub mod W {}
2693 pub mod RW {
2694 #[doc = "A hardware service request for channel 22 is not present"]
2695 pub const HRS22_0: u32 = 0;
2696 #[doc = "A hardware service request for channel 22 is present"]
2697 pub const HRS22_1: u32 = 0x01;
2698 }
2699 }
2700 #[doc = "Hardware Request Status Channel 23"]
2701 pub mod HRS23 {
2702 pub const offset: u32 = 23;
2703 pub const mask: u32 = 0x01 << offset;
2704 pub mod R {}
2705 pub mod W {}
2706 pub mod RW {
2707 #[doc = "A hardware service request for channel 23 is not present"]
2708 pub const HRS23_0: u32 = 0;
2709 #[doc = "A hardware service request for channel 23 is present"]
2710 pub const HRS23_1: u32 = 0x01;
2711 }
2712 }
2713 #[doc = "Hardware Request Status Channel 24"]
2714 pub mod HRS24 {
2715 pub const offset: u32 = 24;
2716 pub const mask: u32 = 0x01 << offset;
2717 pub mod R {}
2718 pub mod W {}
2719 pub mod RW {
2720 #[doc = "A hardware service request for channel 24 is not present"]
2721 pub const HRS24_0: u32 = 0;
2722 #[doc = "A hardware service request for channel 24 is present"]
2723 pub const HRS24_1: u32 = 0x01;
2724 }
2725 }
2726 #[doc = "Hardware Request Status Channel 25"]
2727 pub mod HRS25 {
2728 pub const offset: u32 = 25;
2729 pub const mask: u32 = 0x01 << offset;
2730 pub mod R {}
2731 pub mod W {}
2732 pub mod RW {
2733 #[doc = "A hardware service request for channel 25 is not present"]
2734 pub const HRS25_0: u32 = 0;
2735 #[doc = "A hardware service request for channel 25 is present"]
2736 pub const HRS25_1: u32 = 0x01;
2737 }
2738 }
2739 #[doc = "Hardware Request Status Channel 26"]
2740 pub mod HRS26 {
2741 pub const offset: u32 = 26;
2742 pub const mask: u32 = 0x01 << offset;
2743 pub mod R {}
2744 pub mod W {}
2745 pub mod RW {
2746 #[doc = "A hardware service request for channel 26 is not present"]
2747 pub const HRS26_0: u32 = 0;
2748 #[doc = "A hardware service request for channel 26 is present"]
2749 pub const HRS26_1: u32 = 0x01;
2750 }
2751 }
2752 #[doc = "Hardware Request Status Channel 27"]
2753 pub mod HRS27 {
2754 pub const offset: u32 = 27;
2755 pub const mask: u32 = 0x01 << offset;
2756 pub mod R {}
2757 pub mod W {}
2758 pub mod RW {
2759 #[doc = "A hardware service request for channel 27 is not present"]
2760 pub const HRS27_0: u32 = 0;
2761 #[doc = "A hardware service request for channel 27 is present"]
2762 pub const HRS27_1: u32 = 0x01;
2763 }
2764 }
2765 #[doc = "Hardware Request Status Channel 28"]
2766 pub mod HRS28 {
2767 pub const offset: u32 = 28;
2768 pub const mask: u32 = 0x01 << offset;
2769 pub mod R {}
2770 pub mod W {}
2771 pub mod RW {
2772 #[doc = "A hardware service request for channel 28 is not present"]
2773 pub const HRS28_0: u32 = 0;
2774 #[doc = "A hardware service request for channel 28 is present"]
2775 pub const HRS28_1: u32 = 0x01;
2776 }
2777 }
2778 #[doc = "Hardware Request Status Channel 29"]
2779 pub mod HRS29 {
2780 pub const offset: u32 = 29;
2781 pub const mask: u32 = 0x01 << offset;
2782 pub mod R {}
2783 pub mod W {}
2784 pub mod RW {
2785 #[doc = "A hardware service request for channel 29 is not preset"]
2786 pub const HRS29_0: u32 = 0;
2787 #[doc = "A hardware service request for channel 29 is present"]
2788 pub const HRS29_1: u32 = 0x01;
2789 }
2790 }
2791 #[doc = "Hardware Request Status Channel 30"]
2792 pub mod HRS30 {
2793 pub const offset: u32 = 30;
2794 pub const mask: u32 = 0x01 << offset;
2795 pub mod R {}
2796 pub mod W {}
2797 pub mod RW {
2798 #[doc = "A hardware service request for channel 30 is not present"]
2799 pub const HRS30_0: u32 = 0;
2800 #[doc = "A hardware service request for channel 30 is present"]
2801 pub const HRS30_1: u32 = 0x01;
2802 }
2803 }
2804 #[doc = "Hardware Request Status Channel 31"]
2805 pub mod HRS31 {
2806 pub const offset: u32 = 31;
2807 pub const mask: u32 = 0x01 << offset;
2808 pub mod R {}
2809 pub mod W {}
2810 pub mod RW {
2811 #[doc = "A hardware service request for channel 31 is not present"]
2812 pub const HRS31_0: u32 = 0;
2813 #[doc = "A hardware service request for channel 31 is present"]
2814 pub const HRS31_1: u32 = 0x01;
2815 }
2816 }
2817}
2818#[doc = "Enable Asynchronous Request in Stop Register"]
2819pub mod EARS {
2820 #[doc = "Enable asynchronous DMA request in stop mode for channel 0."]
2821 pub mod EDREQ_0 {
2822 pub const offset: u32 = 0;
2823 pub const mask: u32 = 0x01 << offset;
2824 pub mod R {}
2825 pub mod W {}
2826 pub mod RW {
2827 #[doc = "Disable asynchronous DMA request for channel 0."]
2828 pub const EDREQ_0_0: u32 = 0;
2829 #[doc = "Enable asynchronous DMA request for channel 0."]
2830 pub const EDREQ_0_1: u32 = 0x01;
2831 }
2832 }
2833 #[doc = "Enable asynchronous DMA request in stop mode for channel 1."]
2834 pub mod EDREQ_1 {
2835 pub const offset: u32 = 1;
2836 pub const mask: u32 = 0x01 << offset;
2837 pub mod R {}
2838 pub mod W {}
2839 pub mod RW {
2840 #[doc = "Disable asynchronous DMA request for channel 1"]
2841 pub const EDREQ_1_0: u32 = 0;
2842 #[doc = "Enable asynchronous DMA request for channel 1."]
2843 pub const EDREQ_1_1: u32 = 0x01;
2844 }
2845 }
2846 #[doc = "Enable asynchronous DMA request in stop mode for channel 2."]
2847 pub mod EDREQ_2 {
2848 pub const offset: u32 = 2;
2849 pub const mask: u32 = 0x01 << offset;
2850 pub mod R {}
2851 pub mod W {}
2852 pub mod RW {
2853 #[doc = "Disable asynchronous DMA request for channel 2."]
2854 pub const EDREQ_2_0: u32 = 0;
2855 #[doc = "Enable asynchronous DMA request for channel 2."]
2856 pub const EDREQ_2_1: u32 = 0x01;
2857 }
2858 }
2859 #[doc = "Enable asynchronous DMA request in stop mode for channel 3."]
2860 pub mod EDREQ_3 {
2861 pub const offset: u32 = 3;
2862 pub const mask: u32 = 0x01 << offset;
2863 pub mod R {}
2864 pub mod W {}
2865 pub mod RW {
2866 #[doc = "Disable asynchronous DMA request for channel 3."]
2867 pub const EDREQ_3_0: u32 = 0;
2868 #[doc = "Enable asynchronous DMA request for channel 3."]
2869 pub const EDREQ_3_1: u32 = 0x01;
2870 }
2871 }
2872 #[doc = "Enable asynchronous DMA request in stop mode for channel 4"]
2873 pub mod EDREQ_4 {
2874 pub const offset: u32 = 4;
2875 pub const mask: u32 = 0x01 << offset;
2876 pub mod R {}
2877 pub mod W {}
2878 pub mod RW {
2879 #[doc = "Disable asynchronous DMA request for channel 4."]
2880 pub const EDREQ_4_0: u32 = 0;
2881 #[doc = "Enable asynchronous DMA request for channel 4."]
2882 pub const EDREQ_4_1: u32 = 0x01;
2883 }
2884 }
2885 #[doc = "Enable asynchronous DMA request in stop mode for channel 5"]
2886 pub mod EDREQ_5 {
2887 pub const offset: u32 = 5;
2888 pub const mask: u32 = 0x01 << offset;
2889 pub mod R {}
2890 pub mod W {}
2891 pub mod RW {
2892 #[doc = "Disable asynchronous DMA request for channel 5."]
2893 pub const EDREQ_5_0: u32 = 0;
2894 #[doc = "Enable asynchronous DMA request for channel 5."]
2895 pub const EDREQ_5_1: u32 = 0x01;
2896 }
2897 }
2898 #[doc = "Enable asynchronous DMA request in stop mode for channel 6"]
2899 pub mod EDREQ_6 {
2900 pub const offset: u32 = 6;
2901 pub const mask: u32 = 0x01 << offset;
2902 pub mod R {}
2903 pub mod W {}
2904 pub mod RW {
2905 #[doc = "Disable asynchronous DMA request for channel 6."]
2906 pub const EDREQ_6_0: u32 = 0;
2907 #[doc = "Enable asynchronous DMA request for channel 6."]
2908 pub const EDREQ_6_1: u32 = 0x01;
2909 }
2910 }
2911 #[doc = "Enable asynchronous DMA request in stop mode for channel 7"]
2912 pub mod EDREQ_7 {
2913 pub const offset: u32 = 7;
2914 pub const mask: u32 = 0x01 << offset;
2915 pub mod R {}
2916 pub mod W {}
2917 pub mod RW {
2918 #[doc = "Disable asynchronous DMA request for channel 7."]
2919 pub const EDREQ_7_0: u32 = 0;
2920 #[doc = "Enable asynchronous DMA request for channel 7."]
2921 pub const EDREQ_7_1: u32 = 0x01;
2922 }
2923 }
2924 #[doc = "Enable asynchronous DMA request in stop mode for channel 8"]
2925 pub mod EDREQ_8 {
2926 pub const offset: u32 = 8;
2927 pub const mask: u32 = 0x01 << offset;
2928 pub mod R {}
2929 pub mod W {}
2930 pub mod RW {
2931 #[doc = "Disable asynchronous DMA request for channel 8."]
2932 pub const EDREQ_8_0: u32 = 0;
2933 #[doc = "Enable asynchronous DMA request for channel 8."]
2934 pub const EDREQ_8_1: u32 = 0x01;
2935 }
2936 }
2937 #[doc = "Enable asynchronous DMA request in stop mode for channel 9"]
2938 pub mod EDREQ_9 {
2939 pub const offset: u32 = 9;
2940 pub const mask: u32 = 0x01 << offset;
2941 pub mod R {}
2942 pub mod W {}
2943 pub mod RW {
2944 #[doc = "Disable asynchronous DMA request for channel 9."]
2945 pub const EDREQ_9_0: u32 = 0;
2946 #[doc = "Enable asynchronous DMA request for channel 9."]
2947 pub const EDREQ_9_1: u32 = 0x01;
2948 }
2949 }
2950 #[doc = "Enable asynchronous DMA request in stop mode for channel 10"]
2951 pub mod EDREQ_10 {
2952 pub const offset: u32 = 10;
2953 pub const mask: u32 = 0x01 << offset;
2954 pub mod R {}
2955 pub mod W {}
2956 pub mod RW {
2957 #[doc = "Disable asynchronous DMA request for channel 10."]
2958 pub const EDREQ_10_0: u32 = 0;
2959 #[doc = "Enable asynchronous DMA request for channel 10."]
2960 pub const EDREQ_10_1: u32 = 0x01;
2961 }
2962 }
2963 #[doc = "Enable asynchronous DMA request in stop mode for channel 11"]
2964 pub mod EDREQ_11 {
2965 pub const offset: u32 = 11;
2966 pub const mask: u32 = 0x01 << offset;
2967 pub mod R {}
2968 pub mod W {}
2969 pub mod RW {
2970 #[doc = "Disable asynchronous DMA request for channel 11."]
2971 pub const EDREQ_11_0: u32 = 0;
2972 #[doc = "Enable asynchronous DMA request for channel 11."]
2973 pub const EDREQ_11_1: u32 = 0x01;
2974 }
2975 }
2976 #[doc = "Enable asynchronous DMA request in stop mode for channel 12"]
2977 pub mod EDREQ_12 {
2978 pub const offset: u32 = 12;
2979 pub const mask: u32 = 0x01 << offset;
2980 pub mod R {}
2981 pub mod W {}
2982 pub mod RW {
2983 #[doc = "Disable asynchronous DMA request for channel 12."]
2984 pub const EDREQ_12_0: u32 = 0;
2985 #[doc = "Enable asynchronous DMA request for channel 12."]
2986 pub const EDREQ_12_1: u32 = 0x01;
2987 }
2988 }
2989 #[doc = "Enable asynchronous DMA request in stop mode for channel 13"]
2990 pub mod EDREQ_13 {
2991 pub const offset: u32 = 13;
2992 pub const mask: u32 = 0x01 << offset;
2993 pub mod R {}
2994 pub mod W {}
2995 pub mod RW {
2996 #[doc = "Disable asynchronous DMA request for channel 13."]
2997 pub const EDREQ_13_0: u32 = 0;
2998 #[doc = "Enable asynchronous DMA request for channel 13."]
2999 pub const EDREQ_13_1: u32 = 0x01;
3000 }
3001 }
3002 #[doc = "Enable asynchronous DMA request in stop mode for channel 14"]
3003 pub mod EDREQ_14 {
3004 pub const offset: u32 = 14;
3005 pub const mask: u32 = 0x01 << offset;
3006 pub mod R {}
3007 pub mod W {}
3008 pub mod RW {
3009 #[doc = "Disable asynchronous DMA request for channel 14."]
3010 pub const EDREQ_14_0: u32 = 0;
3011 #[doc = "Enable asynchronous DMA request for channel 14."]
3012 pub const EDREQ_14_1: u32 = 0x01;
3013 }
3014 }
3015 #[doc = "Enable asynchronous DMA request in stop mode for channel 15"]
3016 pub mod EDREQ_15 {
3017 pub const offset: u32 = 15;
3018 pub const mask: u32 = 0x01 << offset;
3019 pub mod R {}
3020 pub mod W {}
3021 pub mod RW {
3022 #[doc = "Disable asynchronous DMA request for channel 15."]
3023 pub const EDREQ_15_0: u32 = 0;
3024 #[doc = "Enable asynchronous DMA request for channel 15."]
3025 pub const EDREQ_15_1: u32 = 0x01;
3026 }
3027 }
3028 #[doc = "Enable asynchronous DMA request in stop mode for channel 16"]
3029 pub mod EDREQ_16 {
3030 pub const offset: u32 = 16;
3031 pub const mask: u32 = 0x01 << offset;
3032 pub mod R {}
3033 pub mod W {}
3034 pub mod RW {
3035 #[doc = "Disable asynchronous DMA request for channel 16"]
3036 pub const EDREQ_16_0: u32 = 0;
3037 #[doc = "Enable asynchronous DMA request for channel 16"]
3038 pub const EDREQ_16_1: u32 = 0x01;
3039 }
3040 }
3041 #[doc = "Enable asynchronous DMA request in stop mode for channel 17"]
3042 pub mod EDREQ_17 {
3043 pub const offset: u32 = 17;
3044 pub const mask: u32 = 0x01 << offset;
3045 pub mod R {}
3046 pub mod W {}
3047 pub mod RW {
3048 #[doc = "Disable asynchronous DMA request for channel 17"]
3049 pub const EDREQ_17_0: u32 = 0;
3050 #[doc = "Enable asynchronous DMA request for channel 17"]
3051 pub const EDREQ_17_1: u32 = 0x01;
3052 }
3053 }
3054 #[doc = "Enable asynchronous DMA request in stop mode for channel 18"]
3055 pub mod EDREQ_18 {
3056 pub const offset: u32 = 18;
3057 pub const mask: u32 = 0x01 << offset;
3058 pub mod R {}
3059 pub mod W {}
3060 pub mod RW {
3061 #[doc = "Disable asynchronous DMA request for channel 18"]
3062 pub const EDREQ_18_0: u32 = 0;
3063 #[doc = "Enable asynchronous DMA request for channel 18"]
3064 pub const EDREQ_18_1: u32 = 0x01;
3065 }
3066 }
3067 #[doc = "Enable asynchronous DMA request in stop mode for channel 19"]
3068 pub mod EDREQ_19 {
3069 pub const offset: u32 = 19;
3070 pub const mask: u32 = 0x01 << offset;
3071 pub mod R {}
3072 pub mod W {}
3073 pub mod RW {
3074 #[doc = "Disable asynchronous DMA request for channel 19"]
3075 pub const EDREQ_19_0: u32 = 0;
3076 #[doc = "Enable asynchronous DMA request for channel 19"]
3077 pub const EDREQ_19_1: u32 = 0x01;
3078 }
3079 }
3080 #[doc = "Enable asynchronous DMA request in stop mode for channel 20"]
3081 pub mod EDREQ_20 {
3082 pub const offset: u32 = 20;
3083 pub const mask: u32 = 0x01 << offset;
3084 pub mod R {}
3085 pub mod W {}
3086 pub mod RW {
3087 #[doc = "Disable asynchronous DMA request for channel 20"]
3088 pub const EDREQ_20_0: u32 = 0;
3089 #[doc = "Enable asynchronous DMA request for channel 20"]
3090 pub const EDREQ_20_1: u32 = 0x01;
3091 }
3092 }
3093 #[doc = "Enable asynchronous DMA request in stop mode for channel 21"]
3094 pub mod EDREQ_21 {
3095 pub const offset: u32 = 21;
3096 pub const mask: u32 = 0x01 << offset;
3097 pub mod R {}
3098 pub mod W {}
3099 pub mod RW {
3100 #[doc = "Disable asynchronous DMA request for channel 21"]
3101 pub const EDREQ_21_0: u32 = 0;
3102 #[doc = "Enable asynchronous DMA request for channel 21"]
3103 pub const EDREQ_21_1: u32 = 0x01;
3104 }
3105 }
3106 #[doc = "Enable asynchronous DMA request in stop mode for channel 22"]
3107 pub mod EDREQ_22 {
3108 pub const offset: u32 = 22;
3109 pub const mask: u32 = 0x01 << offset;
3110 pub mod R {}
3111 pub mod W {}
3112 pub mod RW {
3113 #[doc = "Disable asynchronous DMA request for channel 22"]
3114 pub const EDREQ_22_0: u32 = 0;
3115 #[doc = "Enable asynchronous DMA request for channel 22"]
3116 pub const EDREQ_22_1: u32 = 0x01;
3117 }
3118 }
3119 #[doc = "Enable asynchronous DMA request in stop mode for channel 23"]
3120 pub mod EDREQ_23 {
3121 pub const offset: u32 = 23;
3122 pub const mask: u32 = 0x01 << offset;
3123 pub mod R {}
3124 pub mod W {}
3125 pub mod RW {
3126 #[doc = "Disable asynchronous DMA request for channel 23"]
3127 pub const EDREQ_23_0: u32 = 0;
3128 #[doc = "Enable asynchronous DMA request for channel 23"]
3129 pub const EDREQ_23_1: u32 = 0x01;
3130 }
3131 }
3132 #[doc = "Enable asynchronous DMA request in stop mode for channel 24"]
3133 pub mod EDREQ_24 {
3134 pub const offset: u32 = 24;
3135 pub const mask: u32 = 0x01 << offset;
3136 pub mod R {}
3137 pub mod W {}
3138 pub mod RW {
3139 #[doc = "Disable asynchronous DMA request for channel 24"]
3140 pub const EDREQ_24_0: u32 = 0;
3141 #[doc = "Enable asynchronous DMA request for channel 24"]
3142 pub const EDREQ_24_1: u32 = 0x01;
3143 }
3144 }
3145 #[doc = "Enable asynchronous DMA request in stop mode for channel 25"]
3146 pub mod EDREQ_25 {
3147 pub const offset: u32 = 25;
3148 pub const mask: u32 = 0x01 << offset;
3149 pub mod R {}
3150 pub mod W {}
3151 pub mod RW {
3152 #[doc = "Disable asynchronous DMA request for channel 25"]
3153 pub const EDREQ_25_0: u32 = 0;
3154 #[doc = "Enable asynchronous DMA request for channel 25"]
3155 pub const EDREQ_25_1: u32 = 0x01;
3156 }
3157 }
3158 #[doc = "Enable asynchronous DMA request in stop mode for channel 26"]
3159 pub mod EDREQ_26 {
3160 pub const offset: u32 = 26;
3161 pub const mask: u32 = 0x01 << offset;
3162 pub mod R {}
3163 pub mod W {}
3164 pub mod RW {
3165 #[doc = "Disable asynchronous DMA request for channel 26"]
3166 pub const EDREQ_26_0: u32 = 0;
3167 #[doc = "Enable asynchronous DMA request for channel 26"]
3168 pub const EDREQ_26_1: u32 = 0x01;
3169 }
3170 }
3171 #[doc = "Enable asynchronous DMA request in stop mode for channel 27"]
3172 pub mod EDREQ_27 {
3173 pub const offset: u32 = 27;
3174 pub const mask: u32 = 0x01 << offset;
3175 pub mod R {}
3176 pub mod W {}
3177 pub mod RW {
3178 #[doc = "Disable asynchronous DMA request for channel 27"]
3179 pub const EDREQ_27_0: u32 = 0;
3180 #[doc = "Enable asynchronous DMA request for channel 27"]
3181 pub const EDREQ_27_1: u32 = 0x01;
3182 }
3183 }
3184 #[doc = "Enable asynchronous DMA request in stop mode for channel 28"]
3185 pub mod EDREQ_28 {
3186 pub const offset: u32 = 28;
3187 pub const mask: u32 = 0x01 << offset;
3188 pub mod R {}
3189 pub mod W {}
3190 pub mod RW {
3191 #[doc = "Disable asynchronous DMA request for channel 28"]
3192 pub const EDREQ_28_0: u32 = 0;
3193 #[doc = "Enable asynchronous DMA request for channel 28"]
3194 pub const EDREQ_28_1: u32 = 0x01;
3195 }
3196 }
3197 #[doc = "Enable asynchronous DMA request in stop mode for channel 29"]
3198 pub mod EDREQ_29 {
3199 pub const offset: u32 = 29;
3200 pub const mask: u32 = 0x01 << offset;
3201 pub mod R {}
3202 pub mod W {}
3203 pub mod RW {
3204 #[doc = "Disable asynchronous DMA request for channel 29"]
3205 pub const EDREQ_29_0: u32 = 0;
3206 #[doc = "Enable asynchronous DMA request for channel 29"]
3207 pub const EDREQ_29_1: u32 = 0x01;
3208 }
3209 }
3210 #[doc = "Enable asynchronous DMA request in stop mode for channel 30"]
3211 pub mod EDREQ_30 {
3212 pub const offset: u32 = 30;
3213 pub const mask: u32 = 0x01 << offset;
3214 pub mod R {}
3215 pub mod W {}
3216 pub mod RW {
3217 #[doc = "Disable asynchronous DMA request for channel 30"]
3218 pub const EDREQ_30_0: u32 = 0;
3219 #[doc = "Enable asynchronous DMA request for channel 30"]
3220 pub const EDREQ_30_1: u32 = 0x01;
3221 }
3222 }
3223 #[doc = "Enable asynchronous DMA request in stop mode for channel 31"]
3224 pub mod EDREQ_31 {
3225 pub const offset: u32 = 31;
3226 pub const mask: u32 = 0x01 << offset;
3227 pub mod R {}
3228 pub mod W {}
3229 pub mod RW {
3230 #[doc = "Disable asynchronous DMA request for channel 31"]
3231 pub const EDREQ_31_0: u32 = 0;
3232 #[doc = "Enable asynchronous DMA request for channel 31"]
3233 pub const EDREQ_31_1: u32 = 0x01;
3234 }
3235 }
3236}
3237#[doc = "Channel n Priority Register"]
3238pub mod DCHPRI3 {
3239 #[doc = "Channel n Arbitration Priority"]
3240 pub mod CHPRI {
3241 pub const offset: u8 = 0;
3242 pub const mask: u8 = 0x0f << offset;
3243 pub mod R {}
3244 pub mod W {}
3245 pub mod RW {}
3246 }
3247 #[doc = "Channel n Current Group Priority"]
3248 pub mod GRPPRI {
3249 pub const offset: u8 = 4;
3250 pub const mask: u8 = 0x03 << offset;
3251 pub mod R {}
3252 pub mod W {}
3253 pub mod RW {}
3254 }
3255 #[doc = "Disable Preempt Ability. This field resets to 0."]
3256 pub mod DPA {
3257 pub const offset: u8 = 6;
3258 pub const mask: u8 = 0x01 << offset;
3259 pub mod R {}
3260 pub mod W {}
3261 pub mod RW {
3262 #[doc = "Channel n can suspend a lower priority channel."]
3263 pub const DPA_0: u8 = 0;
3264 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3265 pub const DPA_1: u8 = 0x01;
3266 }
3267 }
3268 #[doc = "Enable Channel Preemption. This field resets to 0."]
3269 pub mod ECP {
3270 pub const offset: u8 = 7;
3271 pub const mask: u8 = 0x01 << offset;
3272 pub mod R {}
3273 pub mod W {}
3274 pub mod RW {
3275 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3276 pub const ECP_0: u8 = 0;
3277 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3278 pub const ECP_1: u8 = 0x01;
3279 }
3280 }
3281}
3282#[doc = "Channel n Priority Register"]
3283pub mod DCHPRI2 {
3284 #[doc = "Channel n Arbitration Priority"]
3285 pub mod CHPRI {
3286 pub const offset: u8 = 0;
3287 pub const mask: u8 = 0x0f << offset;
3288 pub mod R {}
3289 pub mod W {}
3290 pub mod RW {}
3291 }
3292 #[doc = "Channel n Current Group Priority"]
3293 pub mod GRPPRI {
3294 pub const offset: u8 = 4;
3295 pub const mask: u8 = 0x03 << offset;
3296 pub mod R {}
3297 pub mod W {}
3298 pub mod RW {}
3299 }
3300 #[doc = "Disable Preempt Ability. This field resets to 0."]
3301 pub mod DPA {
3302 pub const offset: u8 = 6;
3303 pub const mask: u8 = 0x01 << offset;
3304 pub mod R {}
3305 pub mod W {}
3306 pub mod RW {
3307 #[doc = "Channel n can suspend a lower priority channel."]
3308 pub const DPA_0: u8 = 0;
3309 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3310 pub const DPA_1: u8 = 0x01;
3311 }
3312 }
3313 #[doc = "Enable Channel Preemption. This field resets to 0."]
3314 pub mod ECP {
3315 pub const offset: u8 = 7;
3316 pub const mask: u8 = 0x01 << offset;
3317 pub mod R {}
3318 pub mod W {}
3319 pub mod RW {
3320 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3321 pub const ECP_0: u8 = 0;
3322 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3323 pub const ECP_1: u8 = 0x01;
3324 }
3325 }
3326}
3327#[doc = "Channel n Priority Register"]
3328pub mod DCHPRI1 {
3329 #[doc = "Channel n Arbitration Priority"]
3330 pub mod CHPRI {
3331 pub const offset: u8 = 0;
3332 pub const mask: u8 = 0x0f << offset;
3333 pub mod R {}
3334 pub mod W {}
3335 pub mod RW {}
3336 }
3337 #[doc = "Channel n Current Group Priority"]
3338 pub mod GRPPRI {
3339 pub const offset: u8 = 4;
3340 pub const mask: u8 = 0x03 << offset;
3341 pub mod R {}
3342 pub mod W {}
3343 pub mod RW {}
3344 }
3345 #[doc = "Disable Preempt Ability. This field resets to 0."]
3346 pub mod DPA {
3347 pub const offset: u8 = 6;
3348 pub const mask: u8 = 0x01 << offset;
3349 pub mod R {}
3350 pub mod W {}
3351 pub mod RW {
3352 #[doc = "Channel n can suspend a lower priority channel."]
3353 pub const DPA_0: u8 = 0;
3354 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3355 pub const DPA_1: u8 = 0x01;
3356 }
3357 }
3358 #[doc = "Enable Channel Preemption. This field resets to 0."]
3359 pub mod ECP {
3360 pub const offset: u8 = 7;
3361 pub const mask: u8 = 0x01 << offset;
3362 pub mod R {}
3363 pub mod W {}
3364 pub mod RW {
3365 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3366 pub const ECP_0: u8 = 0;
3367 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3368 pub const ECP_1: u8 = 0x01;
3369 }
3370 }
3371}
3372#[doc = "Channel n Priority Register"]
3373pub mod DCHPRI0 {
3374 #[doc = "Channel n Arbitration Priority"]
3375 pub mod CHPRI {
3376 pub const offset: u8 = 0;
3377 pub const mask: u8 = 0x0f << offset;
3378 pub mod R {}
3379 pub mod W {}
3380 pub mod RW {}
3381 }
3382 #[doc = "Channel n Current Group Priority"]
3383 pub mod GRPPRI {
3384 pub const offset: u8 = 4;
3385 pub const mask: u8 = 0x03 << offset;
3386 pub mod R {}
3387 pub mod W {}
3388 pub mod RW {}
3389 }
3390 #[doc = "Disable Preempt Ability. This field resets to 0."]
3391 pub mod DPA {
3392 pub const offset: u8 = 6;
3393 pub const mask: u8 = 0x01 << offset;
3394 pub mod R {}
3395 pub mod W {}
3396 pub mod RW {
3397 #[doc = "Channel n can suspend a lower priority channel."]
3398 pub const DPA_0: u8 = 0;
3399 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3400 pub const DPA_1: u8 = 0x01;
3401 }
3402 }
3403 #[doc = "Enable Channel Preemption. This field resets to 0."]
3404 pub mod ECP {
3405 pub const offset: u8 = 7;
3406 pub const mask: u8 = 0x01 << offset;
3407 pub mod R {}
3408 pub mod W {}
3409 pub mod RW {
3410 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3411 pub const ECP_0: u8 = 0;
3412 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3413 pub const ECP_1: u8 = 0x01;
3414 }
3415 }
3416}
3417#[doc = "Channel n Priority Register"]
3418pub mod DCHPRI7 {
3419 #[doc = "Channel n Arbitration Priority"]
3420 pub mod CHPRI {
3421 pub const offset: u8 = 0;
3422 pub const mask: u8 = 0x0f << offset;
3423 pub mod R {}
3424 pub mod W {}
3425 pub mod RW {}
3426 }
3427 #[doc = "Channel n Current Group Priority"]
3428 pub mod GRPPRI {
3429 pub const offset: u8 = 4;
3430 pub const mask: u8 = 0x03 << offset;
3431 pub mod R {}
3432 pub mod W {}
3433 pub mod RW {}
3434 }
3435 #[doc = "Disable Preempt Ability. This field resets to 0."]
3436 pub mod DPA {
3437 pub const offset: u8 = 6;
3438 pub const mask: u8 = 0x01 << offset;
3439 pub mod R {}
3440 pub mod W {}
3441 pub mod RW {
3442 #[doc = "Channel n can suspend a lower priority channel."]
3443 pub const DPA_0: u8 = 0;
3444 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3445 pub const DPA_1: u8 = 0x01;
3446 }
3447 }
3448 #[doc = "Enable Channel Preemption. This field resets to 0."]
3449 pub mod ECP {
3450 pub const offset: u8 = 7;
3451 pub const mask: u8 = 0x01 << offset;
3452 pub mod R {}
3453 pub mod W {}
3454 pub mod RW {
3455 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3456 pub const ECP_0: u8 = 0;
3457 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3458 pub const ECP_1: u8 = 0x01;
3459 }
3460 }
3461}
3462#[doc = "Channel n Priority Register"]
3463pub mod DCHPRI6 {
3464 #[doc = "Channel n Arbitration Priority"]
3465 pub mod CHPRI {
3466 pub const offset: u8 = 0;
3467 pub const mask: u8 = 0x0f << offset;
3468 pub mod R {}
3469 pub mod W {}
3470 pub mod RW {}
3471 }
3472 #[doc = "Channel n Current Group Priority"]
3473 pub mod GRPPRI {
3474 pub const offset: u8 = 4;
3475 pub const mask: u8 = 0x03 << offset;
3476 pub mod R {}
3477 pub mod W {}
3478 pub mod RW {}
3479 }
3480 #[doc = "Disable Preempt Ability. This field resets to 0."]
3481 pub mod DPA {
3482 pub const offset: u8 = 6;
3483 pub const mask: u8 = 0x01 << offset;
3484 pub mod R {}
3485 pub mod W {}
3486 pub mod RW {
3487 #[doc = "Channel n can suspend a lower priority channel."]
3488 pub const DPA_0: u8 = 0;
3489 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3490 pub const DPA_1: u8 = 0x01;
3491 }
3492 }
3493 #[doc = "Enable Channel Preemption. This field resets to 0."]
3494 pub mod ECP {
3495 pub const offset: u8 = 7;
3496 pub const mask: u8 = 0x01 << offset;
3497 pub mod R {}
3498 pub mod W {}
3499 pub mod RW {
3500 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3501 pub const ECP_0: u8 = 0;
3502 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3503 pub const ECP_1: u8 = 0x01;
3504 }
3505 }
3506}
3507#[doc = "Channel n Priority Register"]
3508pub mod DCHPRI5 {
3509 #[doc = "Channel n Arbitration Priority"]
3510 pub mod CHPRI {
3511 pub const offset: u8 = 0;
3512 pub const mask: u8 = 0x0f << offset;
3513 pub mod R {}
3514 pub mod W {}
3515 pub mod RW {}
3516 }
3517 #[doc = "Channel n Current Group Priority"]
3518 pub mod GRPPRI {
3519 pub const offset: u8 = 4;
3520 pub const mask: u8 = 0x03 << offset;
3521 pub mod R {}
3522 pub mod W {}
3523 pub mod RW {}
3524 }
3525 #[doc = "Disable Preempt Ability. This field resets to 0."]
3526 pub mod DPA {
3527 pub const offset: u8 = 6;
3528 pub const mask: u8 = 0x01 << offset;
3529 pub mod R {}
3530 pub mod W {}
3531 pub mod RW {
3532 #[doc = "Channel n can suspend a lower priority channel."]
3533 pub const DPA_0: u8 = 0;
3534 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3535 pub const DPA_1: u8 = 0x01;
3536 }
3537 }
3538 #[doc = "Enable Channel Preemption. This field resets to 0."]
3539 pub mod ECP {
3540 pub const offset: u8 = 7;
3541 pub const mask: u8 = 0x01 << offset;
3542 pub mod R {}
3543 pub mod W {}
3544 pub mod RW {
3545 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3546 pub const ECP_0: u8 = 0;
3547 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3548 pub const ECP_1: u8 = 0x01;
3549 }
3550 }
3551}
3552#[doc = "Channel n Priority Register"]
3553pub mod DCHPRI4 {
3554 #[doc = "Channel n Arbitration Priority"]
3555 pub mod CHPRI {
3556 pub const offset: u8 = 0;
3557 pub const mask: u8 = 0x0f << offset;
3558 pub mod R {}
3559 pub mod W {}
3560 pub mod RW {}
3561 }
3562 #[doc = "Channel n Current Group Priority"]
3563 pub mod GRPPRI {
3564 pub const offset: u8 = 4;
3565 pub const mask: u8 = 0x03 << offset;
3566 pub mod R {}
3567 pub mod W {}
3568 pub mod RW {}
3569 }
3570 #[doc = "Disable Preempt Ability. This field resets to 0."]
3571 pub mod DPA {
3572 pub const offset: u8 = 6;
3573 pub const mask: u8 = 0x01 << offset;
3574 pub mod R {}
3575 pub mod W {}
3576 pub mod RW {
3577 #[doc = "Channel n can suspend a lower priority channel."]
3578 pub const DPA_0: u8 = 0;
3579 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3580 pub const DPA_1: u8 = 0x01;
3581 }
3582 }
3583 #[doc = "Enable Channel Preemption. This field resets to 0."]
3584 pub mod ECP {
3585 pub const offset: u8 = 7;
3586 pub const mask: u8 = 0x01 << offset;
3587 pub mod R {}
3588 pub mod W {}
3589 pub mod RW {
3590 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3591 pub const ECP_0: u8 = 0;
3592 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3593 pub const ECP_1: u8 = 0x01;
3594 }
3595 }
3596}
3597#[doc = "Channel n Priority Register"]
3598pub mod DCHPRI11 {
3599 #[doc = "Channel n Arbitration Priority"]
3600 pub mod CHPRI {
3601 pub const offset: u8 = 0;
3602 pub const mask: u8 = 0x0f << offset;
3603 pub mod R {}
3604 pub mod W {}
3605 pub mod RW {}
3606 }
3607 #[doc = "Channel n Current Group Priority"]
3608 pub mod GRPPRI {
3609 pub const offset: u8 = 4;
3610 pub const mask: u8 = 0x03 << offset;
3611 pub mod R {}
3612 pub mod W {}
3613 pub mod RW {}
3614 }
3615 #[doc = "Disable Preempt Ability. This field resets to 0."]
3616 pub mod DPA {
3617 pub const offset: u8 = 6;
3618 pub const mask: u8 = 0x01 << offset;
3619 pub mod R {}
3620 pub mod W {}
3621 pub mod RW {
3622 #[doc = "Channel n can suspend a lower priority channel."]
3623 pub const DPA_0: u8 = 0;
3624 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3625 pub const DPA_1: u8 = 0x01;
3626 }
3627 }
3628 #[doc = "Enable Channel Preemption. This field resets to 0."]
3629 pub mod ECP {
3630 pub const offset: u8 = 7;
3631 pub const mask: u8 = 0x01 << offset;
3632 pub mod R {}
3633 pub mod W {}
3634 pub mod RW {
3635 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3636 pub const ECP_0: u8 = 0;
3637 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3638 pub const ECP_1: u8 = 0x01;
3639 }
3640 }
3641}
3642#[doc = "Channel n Priority Register"]
3643pub mod DCHPRI10 {
3644 #[doc = "Channel n Arbitration Priority"]
3645 pub mod CHPRI {
3646 pub const offset: u8 = 0;
3647 pub const mask: u8 = 0x0f << offset;
3648 pub mod R {}
3649 pub mod W {}
3650 pub mod RW {}
3651 }
3652 #[doc = "Channel n Current Group Priority"]
3653 pub mod GRPPRI {
3654 pub const offset: u8 = 4;
3655 pub const mask: u8 = 0x03 << offset;
3656 pub mod R {}
3657 pub mod W {}
3658 pub mod RW {}
3659 }
3660 #[doc = "Disable Preempt Ability. This field resets to 0."]
3661 pub mod DPA {
3662 pub const offset: u8 = 6;
3663 pub const mask: u8 = 0x01 << offset;
3664 pub mod R {}
3665 pub mod W {}
3666 pub mod RW {
3667 #[doc = "Channel n can suspend a lower priority channel."]
3668 pub const DPA_0: u8 = 0;
3669 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3670 pub const DPA_1: u8 = 0x01;
3671 }
3672 }
3673 #[doc = "Enable Channel Preemption. This field resets to 0."]
3674 pub mod ECP {
3675 pub const offset: u8 = 7;
3676 pub const mask: u8 = 0x01 << offset;
3677 pub mod R {}
3678 pub mod W {}
3679 pub mod RW {
3680 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3681 pub const ECP_0: u8 = 0;
3682 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3683 pub const ECP_1: u8 = 0x01;
3684 }
3685 }
3686}
3687#[doc = "Channel n Priority Register"]
3688pub mod DCHPRI9 {
3689 #[doc = "Channel n Arbitration Priority"]
3690 pub mod CHPRI {
3691 pub const offset: u8 = 0;
3692 pub const mask: u8 = 0x0f << offset;
3693 pub mod R {}
3694 pub mod W {}
3695 pub mod RW {}
3696 }
3697 #[doc = "Channel n Current Group Priority"]
3698 pub mod GRPPRI {
3699 pub const offset: u8 = 4;
3700 pub const mask: u8 = 0x03 << offset;
3701 pub mod R {}
3702 pub mod W {}
3703 pub mod RW {}
3704 }
3705 #[doc = "Disable Preempt Ability. This field resets to 0."]
3706 pub mod DPA {
3707 pub const offset: u8 = 6;
3708 pub const mask: u8 = 0x01 << offset;
3709 pub mod R {}
3710 pub mod W {}
3711 pub mod RW {
3712 #[doc = "Channel n can suspend a lower priority channel."]
3713 pub const DPA_0: u8 = 0;
3714 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3715 pub const DPA_1: u8 = 0x01;
3716 }
3717 }
3718 #[doc = "Enable Channel Preemption. This field resets to 0."]
3719 pub mod ECP {
3720 pub const offset: u8 = 7;
3721 pub const mask: u8 = 0x01 << offset;
3722 pub mod R {}
3723 pub mod W {}
3724 pub mod RW {
3725 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3726 pub const ECP_0: u8 = 0;
3727 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3728 pub const ECP_1: u8 = 0x01;
3729 }
3730 }
3731}
3732#[doc = "Channel n Priority Register"]
3733pub mod DCHPRI8 {
3734 #[doc = "Channel n Arbitration Priority"]
3735 pub mod CHPRI {
3736 pub const offset: u8 = 0;
3737 pub const mask: u8 = 0x0f << offset;
3738 pub mod R {}
3739 pub mod W {}
3740 pub mod RW {}
3741 }
3742 #[doc = "Channel n Current Group Priority"]
3743 pub mod GRPPRI {
3744 pub const offset: u8 = 4;
3745 pub const mask: u8 = 0x03 << offset;
3746 pub mod R {}
3747 pub mod W {}
3748 pub mod RW {}
3749 }
3750 #[doc = "Disable Preempt Ability. This field resets to 0."]
3751 pub mod DPA {
3752 pub const offset: u8 = 6;
3753 pub const mask: u8 = 0x01 << offset;
3754 pub mod R {}
3755 pub mod W {}
3756 pub mod RW {
3757 #[doc = "Channel n can suspend a lower priority channel."]
3758 pub const DPA_0: u8 = 0;
3759 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3760 pub const DPA_1: u8 = 0x01;
3761 }
3762 }
3763 #[doc = "Enable Channel Preemption. This field resets to 0."]
3764 pub mod ECP {
3765 pub const offset: u8 = 7;
3766 pub const mask: u8 = 0x01 << offset;
3767 pub mod R {}
3768 pub mod W {}
3769 pub mod RW {
3770 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3771 pub const ECP_0: u8 = 0;
3772 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3773 pub const ECP_1: u8 = 0x01;
3774 }
3775 }
3776}
3777#[doc = "Channel n Priority Register"]
3778pub mod DCHPRI15 {
3779 #[doc = "Channel n Arbitration Priority"]
3780 pub mod CHPRI {
3781 pub const offset: u8 = 0;
3782 pub const mask: u8 = 0x0f << offset;
3783 pub mod R {}
3784 pub mod W {}
3785 pub mod RW {}
3786 }
3787 #[doc = "Channel n Current Group Priority"]
3788 pub mod GRPPRI {
3789 pub const offset: u8 = 4;
3790 pub const mask: u8 = 0x03 << offset;
3791 pub mod R {}
3792 pub mod W {}
3793 pub mod RW {}
3794 }
3795 #[doc = "Disable Preempt Ability. This field resets to 0."]
3796 pub mod DPA {
3797 pub const offset: u8 = 6;
3798 pub const mask: u8 = 0x01 << offset;
3799 pub mod R {}
3800 pub mod W {}
3801 pub mod RW {
3802 #[doc = "Channel n can suspend a lower priority channel."]
3803 pub const DPA_0: u8 = 0;
3804 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3805 pub const DPA_1: u8 = 0x01;
3806 }
3807 }
3808 #[doc = "Enable Channel Preemption. This field resets to 0."]
3809 pub mod ECP {
3810 pub const offset: u8 = 7;
3811 pub const mask: u8 = 0x01 << offset;
3812 pub mod R {}
3813 pub mod W {}
3814 pub mod RW {
3815 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3816 pub const ECP_0: u8 = 0;
3817 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3818 pub const ECP_1: u8 = 0x01;
3819 }
3820 }
3821}
3822#[doc = "Channel n Priority Register"]
3823pub mod DCHPRI14 {
3824 #[doc = "Channel n Arbitration Priority"]
3825 pub mod CHPRI {
3826 pub const offset: u8 = 0;
3827 pub const mask: u8 = 0x0f << offset;
3828 pub mod R {}
3829 pub mod W {}
3830 pub mod RW {}
3831 }
3832 #[doc = "Channel n Current Group Priority"]
3833 pub mod GRPPRI {
3834 pub const offset: u8 = 4;
3835 pub const mask: u8 = 0x03 << offset;
3836 pub mod R {}
3837 pub mod W {}
3838 pub mod RW {}
3839 }
3840 #[doc = "Disable Preempt Ability. This field resets to 0."]
3841 pub mod DPA {
3842 pub const offset: u8 = 6;
3843 pub const mask: u8 = 0x01 << offset;
3844 pub mod R {}
3845 pub mod W {}
3846 pub mod RW {
3847 #[doc = "Channel n can suspend a lower priority channel."]
3848 pub const DPA_0: u8 = 0;
3849 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3850 pub const DPA_1: u8 = 0x01;
3851 }
3852 }
3853 #[doc = "Enable Channel Preemption. This field resets to 0."]
3854 pub mod ECP {
3855 pub const offset: u8 = 7;
3856 pub const mask: u8 = 0x01 << offset;
3857 pub mod R {}
3858 pub mod W {}
3859 pub mod RW {
3860 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3861 pub const ECP_0: u8 = 0;
3862 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3863 pub const ECP_1: u8 = 0x01;
3864 }
3865 }
3866}
3867#[doc = "Channel n Priority Register"]
3868pub mod DCHPRI13 {
3869 #[doc = "Channel n Arbitration Priority"]
3870 pub mod CHPRI {
3871 pub const offset: u8 = 0;
3872 pub const mask: u8 = 0x0f << offset;
3873 pub mod R {}
3874 pub mod W {}
3875 pub mod RW {}
3876 }
3877 #[doc = "Channel n Current Group Priority"]
3878 pub mod GRPPRI {
3879 pub const offset: u8 = 4;
3880 pub const mask: u8 = 0x03 << offset;
3881 pub mod R {}
3882 pub mod W {}
3883 pub mod RW {}
3884 }
3885 #[doc = "Disable Preempt Ability. This field resets to 0."]
3886 pub mod DPA {
3887 pub const offset: u8 = 6;
3888 pub const mask: u8 = 0x01 << offset;
3889 pub mod R {}
3890 pub mod W {}
3891 pub mod RW {
3892 #[doc = "Channel n can suspend a lower priority channel."]
3893 pub const DPA_0: u8 = 0;
3894 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3895 pub const DPA_1: u8 = 0x01;
3896 }
3897 }
3898 #[doc = "Enable Channel Preemption. This field resets to 0."]
3899 pub mod ECP {
3900 pub const offset: u8 = 7;
3901 pub const mask: u8 = 0x01 << offset;
3902 pub mod R {}
3903 pub mod W {}
3904 pub mod RW {
3905 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3906 pub const ECP_0: u8 = 0;
3907 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3908 pub const ECP_1: u8 = 0x01;
3909 }
3910 }
3911}
3912#[doc = "Channel n Priority Register"]
3913pub mod DCHPRI12 {
3914 #[doc = "Channel n Arbitration Priority"]
3915 pub mod CHPRI {
3916 pub const offset: u8 = 0;
3917 pub const mask: u8 = 0x0f << offset;
3918 pub mod R {}
3919 pub mod W {}
3920 pub mod RW {}
3921 }
3922 #[doc = "Channel n Current Group Priority"]
3923 pub mod GRPPRI {
3924 pub const offset: u8 = 4;
3925 pub const mask: u8 = 0x03 << offset;
3926 pub mod R {}
3927 pub mod W {}
3928 pub mod RW {}
3929 }
3930 #[doc = "Disable Preempt Ability. This field resets to 0."]
3931 pub mod DPA {
3932 pub const offset: u8 = 6;
3933 pub const mask: u8 = 0x01 << offset;
3934 pub mod R {}
3935 pub mod W {}
3936 pub mod RW {
3937 #[doc = "Channel n can suspend a lower priority channel."]
3938 pub const DPA_0: u8 = 0;
3939 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3940 pub const DPA_1: u8 = 0x01;
3941 }
3942 }
3943 #[doc = "Enable Channel Preemption. This field resets to 0."]
3944 pub mod ECP {
3945 pub const offset: u8 = 7;
3946 pub const mask: u8 = 0x01 << offset;
3947 pub mod R {}
3948 pub mod W {}
3949 pub mod RW {
3950 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3951 pub const ECP_0: u8 = 0;
3952 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3953 pub const ECP_1: u8 = 0x01;
3954 }
3955 }
3956}
3957#[doc = "Channel n Priority Register"]
3958pub mod DCHPRI19 {
3959 #[doc = "Channel n Arbitration Priority"]
3960 pub mod CHPRI {
3961 pub const offset: u8 = 0;
3962 pub const mask: u8 = 0x0f << offset;
3963 pub mod R {}
3964 pub mod W {}
3965 pub mod RW {}
3966 }
3967 #[doc = "Channel n Current Group Priority"]
3968 pub mod GRPPRI {
3969 pub const offset: u8 = 4;
3970 pub const mask: u8 = 0x03 << offset;
3971 pub mod R {}
3972 pub mod W {}
3973 pub mod RW {}
3974 }
3975 #[doc = "Disable Preempt Ability. This field resets to 0."]
3976 pub mod DPA {
3977 pub const offset: u8 = 6;
3978 pub const mask: u8 = 0x01 << offset;
3979 pub mod R {}
3980 pub mod W {}
3981 pub mod RW {
3982 #[doc = "Channel n can suspend a lower priority channel."]
3983 pub const DPA_0: u8 = 0;
3984 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
3985 pub const DPA_1: u8 = 0x01;
3986 }
3987 }
3988 #[doc = "Enable Channel Preemption. This field resets to 0."]
3989 pub mod ECP {
3990 pub const offset: u8 = 7;
3991 pub const mask: u8 = 0x01 << offset;
3992 pub mod R {}
3993 pub mod W {}
3994 pub mod RW {
3995 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
3996 pub const ECP_0: u8 = 0;
3997 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
3998 pub const ECP_1: u8 = 0x01;
3999 }
4000 }
4001}
4002#[doc = "Channel n Priority Register"]
4003pub mod DCHPRI18 {
4004 #[doc = "Channel n Arbitration Priority"]
4005 pub mod CHPRI {
4006 pub const offset: u8 = 0;
4007 pub const mask: u8 = 0x0f << offset;
4008 pub mod R {}
4009 pub mod W {}
4010 pub mod RW {}
4011 }
4012 #[doc = "Channel n Current Group Priority"]
4013 pub mod GRPPRI {
4014 pub const offset: u8 = 4;
4015 pub const mask: u8 = 0x03 << offset;
4016 pub mod R {}
4017 pub mod W {}
4018 pub mod RW {}
4019 }
4020 #[doc = "Disable Preempt Ability. This field resets to 0."]
4021 pub mod DPA {
4022 pub const offset: u8 = 6;
4023 pub const mask: u8 = 0x01 << offset;
4024 pub mod R {}
4025 pub mod W {}
4026 pub mod RW {
4027 #[doc = "Channel n can suspend a lower priority channel."]
4028 pub const DPA_0: u8 = 0;
4029 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4030 pub const DPA_1: u8 = 0x01;
4031 }
4032 }
4033 #[doc = "Enable Channel Preemption. This field resets to 0."]
4034 pub mod ECP {
4035 pub const offset: u8 = 7;
4036 pub const mask: u8 = 0x01 << offset;
4037 pub mod R {}
4038 pub mod W {}
4039 pub mod RW {
4040 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4041 pub const ECP_0: u8 = 0;
4042 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4043 pub const ECP_1: u8 = 0x01;
4044 }
4045 }
4046}
4047#[doc = "Channel n Priority Register"]
4048pub mod DCHPRI17 {
4049 #[doc = "Channel n Arbitration Priority"]
4050 pub mod CHPRI {
4051 pub const offset: u8 = 0;
4052 pub const mask: u8 = 0x0f << offset;
4053 pub mod R {}
4054 pub mod W {}
4055 pub mod RW {}
4056 }
4057 #[doc = "Channel n Current Group Priority"]
4058 pub mod GRPPRI {
4059 pub const offset: u8 = 4;
4060 pub const mask: u8 = 0x03 << offset;
4061 pub mod R {}
4062 pub mod W {}
4063 pub mod RW {}
4064 }
4065 #[doc = "Disable Preempt Ability. This field resets to 0."]
4066 pub mod DPA {
4067 pub const offset: u8 = 6;
4068 pub const mask: u8 = 0x01 << offset;
4069 pub mod R {}
4070 pub mod W {}
4071 pub mod RW {
4072 #[doc = "Channel n can suspend a lower priority channel."]
4073 pub const DPA_0: u8 = 0;
4074 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4075 pub const DPA_1: u8 = 0x01;
4076 }
4077 }
4078 #[doc = "Enable Channel Preemption. This field resets to 0."]
4079 pub mod ECP {
4080 pub const offset: u8 = 7;
4081 pub const mask: u8 = 0x01 << offset;
4082 pub mod R {}
4083 pub mod W {}
4084 pub mod RW {
4085 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4086 pub const ECP_0: u8 = 0;
4087 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4088 pub const ECP_1: u8 = 0x01;
4089 }
4090 }
4091}
4092#[doc = "Channel n Priority Register"]
4093pub mod DCHPRI16 {
4094 #[doc = "Channel n Arbitration Priority"]
4095 pub mod CHPRI {
4096 pub const offset: u8 = 0;
4097 pub const mask: u8 = 0x0f << offset;
4098 pub mod R {}
4099 pub mod W {}
4100 pub mod RW {}
4101 }
4102 #[doc = "Channel n Current Group Priority"]
4103 pub mod GRPPRI {
4104 pub const offset: u8 = 4;
4105 pub const mask: u8 = 0x03 << offset;
4106 pub mod R {}
4107 pub mod W {}
4108 pub mod RW {}
4109 }
4110 #[doc = "Disable Preempt Ability. This field resets to 0."]
4111 pub mod DPA {
4112 pub const offset: u8 = 6;
4113 pub const mask: u8 = 0x01 << offset;
4114 pub mod R {}
4115 pub mod W {}
4116 pub mod RW {
4117 #[doc = "Channel n can suspend a lower priority channel."]
4118 pub const DPA_0: u8 = 0;
4119 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4120 pub const DPA_1: u8 = 0x01;
4121 }
4122 }
4123 #[doc = "Enable Channel Preemption. This field resets to 0."]
4124 pub mod ECP {
4125 pub const offset: u8 = 7;
4126 pub const mask: u8 = 0x01 << offset;
4127 pub mod R {}
4128 pub mod W {}
4129 pub mod RW {
4130 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4131 pub const ECP_0: u8 = 0;
4132 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4133 pub const ECP_1: u8 = 0x01;
4134 }
4135 }
4136}
4137#[doc = "Channel n Priority Register"]
4138pub mod DCHPRI23 {
4139 #[doc = "Channel n Arbitration Priority"]
4140 pub mod CHPRI {
4141 pub const offset: u8 = 0;
4142 pub const mask: u8 = 0x0f << offset;
4143 pub mod R {}
4144 pub mod W {}
4145 pub mod RW {}
4146 }
4147 #[doc = "Channel n Current Group Priority"]
4148 pub mod GRPPRI {
4149 pub const offset: u8 = 4;
4150 pub const mask: u8 = 0x03 << offset;
4151 pub mod R {}
4152 pub mod W {}
4153 pub mod RW {}
4154 }
4155 #[doc = "Disable Preempt Ability. This field resets to 0."]
4156 pub mod DPA {
4157 pub const offset: u8 = 6;
4158 pub const mask: u8 = 0x01 << offset;
4159 pub mod R {}
4160 pub mod W {}
4161 pub mod RW {
4162 #[doc = "Channel n can suspend a lower priority channel."]
4163 pub const DPA_0: u8 = 0;
4164 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4165 pub const DPA_1: u8 = 0x01;
4166 }
4167 }
4168 #[doc = "Enable Channel Preemption. This field resets to 0."]
4169 pub mod ECP {
4170 pub const offset: u8 = 7;
4171 pub const mask: u8 = 0x01 << offset;
4172 pub mod R {}
4173 pub mod W {}
4174 pub mod RW {
4175 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4176 pub const ECP_0: u8 = 0;
4177 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4178 pub const ECP_1: u8 = 0x01;
4179 }
4180 }
4181}
4182#[doc = "Channel n Priority Register"]
4183pub mod DCHPRI22 {
4184 #[doc = "Channel n Arbitration Priority"]
4185 pub mod CHPRI {
4186 pub const offset: u8 = 0;
4187 pub const mask: u8 = 0x0f << offset;
4188 pub mod R {}
4189 pub mod W {}
4190 pub mod RW {}
4191 }
4192 #[doc = "Channel n Current Group Priority"]
4193 pub mod GRPPRI {
4194 pub const offset: u8 = 4;
4195 pub const mask: u8 = 0x03 << offset;
4196 pub mod R {}
4197 pub mod W {}
4198 pub mod RW {}
4199 }
4200 #[doc = "Disable Preempt Ability. This field resets to 0."]
4201 pub mod DPA {
4202 pub const offset: u8 = 6;
4203 pub const mask: u8 = 0x01 << offset;
4204 pub mod R {}
4205 pub mod W {}
4206 pub mod RW {
4207 #[doc = "Channel n can suspend a lower priority channel."]
4208 pub const DPA_0: u8 = 0;
4209 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4210 pub const DPA_1: u8 = 0x01;
4211 }
4212 }
4213 #[doc = "Enable Channel Preemption. This field resets to 0."]
4214 pub mod ECP {
4215 pub const offset: u8 = 7;
4216 pub const mask: u8 = 0x01 << offset;
4217 pub mod R {}
4218 pub mod W {}
4219 pub mod RW {
4220 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4221 pub const ECP_0: u8 = 0;
4222 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4223 pub const ECP_1: u8 = 0x01;
4224 }
4225 }
4226}
4227#[doc = "Channel n Priority Register"]
4228pub mod DCHPRI21 {
4229 #[doc = "Channel n Arbitration Priority"]
4230 pub mod CHPRI {
4231 pub const offset: u8 = 0;
4232 pub const mask: u8 = 0x0f << offset;
4233 pub mod R {}
4234 pub mod W {}
4235 pub mod RW {}
4236 }
4237 #[doc = "Channel n Current Group Priority"]
4238 pub mod GRPPRI {
4239 pub const offset: u8 = 4;
4240 pub const mask: u8 = 0x03 << offset;
4241 pub mod R {}
4242 pub mod W {}
4243 pub mod RW {}
4244 }
4245 #[doc = "Disable Preempt Ability. This field resets to 0."]
4246 pub mod DPA {
4247 pub const offset: u8 = 6;
4248 pub const mask: u8 = 0x01 << offset;
4249 pub mod R {}
4250 pub mod W {}
4251 pub mod RW {
4252 #[doc = "Channel n can suspend a lower priority channel."]
4253 pub const DPA_0: u8 = 0;
4254 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4255 pub const DPA_1: u8 = 0x01;
4256 }
4257 }
4258 #[doc = "Enable Channel Preemption. This field resets to 0."]
4259 pub mod ECP {
4260 pub const offset: u8 = 7;
4261 pub const mask: u8 = 0x01 << offset;
4262 pub mod R {}
4263 pub mod W {}
4264 pub mod RW {
4265 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4266 pub const ECP_0: u8 = 0;
4267 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4268 pub const ECP_1: u8 = 0x01;
4269 }
4270 }
4271}
4272#[doc = "Channel n Priority Register"]
4273pub mod DCHPRI20 {
4274 #[doc = "Channel n Arbitration Priority"]
4275 pub mod CHPRI {
4276 pub const offset: u8 = 0;
4277 pub const mask: u8 = 0x0f << offset;
4278 pub mod R {}
4279 pub mod W {}
4280 pub mod RW {}
4281 }
4282 #[doc = "Channel n Current Group Priority"]
4283 pub mod GRPPRI {
4284 pub const offset: u8 = 4;
4285 pub const mask: u8 = 0x03 << offset;
4286 pub mod R {}
4287 pub mod W {}
4288 pub mod RW {}
4289 }
4290 #[doc = "Disable Preempt Ability. This field resets to 0."]
4291 pub mod DPA {
4292 pub const offset: u8 = 6;
4293 pub const mask: u8 = 0x01 << offset;
4294 pub mod R {}
4295 pub mod W {}
4296 pub mod RW {
4297 #[doc = "Channel n can suspend a lower priority channel."]
4298 pub const DPA_0: u8 = 0;
4299 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4300 pub const DPA_1: u8 = 0x01;
4301 }
4302 }
4303 #[doc = "Enable Channel Preemption. This field resets to 0."]
4304 pub mod ECP {
4305 pub const offset: u8 = 7;
4306 pub const mask: u8 = 0x01 << offset;
4307 pub mod R {}
4308 pub mod W {}
4309 pub mod RW {
4310 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4311 pub const ECP_0: u8 = 0;
4312 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4313 pub const ECP_1: u8 = 0x01;
4314 }
4315 }
4316}
4317#[doc = "Channel n Priority Register"]
4318pub mod DCHPRI27 {
4319 #[doc = "Channel n Arbitration Priority"]
4320 pub mod CHPRI {
4321 pub const offset: u8 = 0;
4322 pub const mask: u8 = 0x0f << offset;
4323 pub mod R {}
4324 pub mod W {}
4325 pub mod RW {}
4326 }
4327 #[doc = "Channel n Current Group Priority"]
4328 pub mod GRPPRI {
4329 pub const offset: u8 = 4;
4330 pub const mask: u8 = 0x03 << offset;
4331 pub mod R {}
4332 pub mod W {}
4333 pub mod RW {}
4334 }
4335 #[doc = "Disable Preempt Ability. This field resets to 0."]
4336 pub mod DPA {
4337 pub const offset: u8 = 6;
4338 pub const mask: u8 = 0x01 << offset;
4339 pub mod R {}
4340 pub mod W {}
4341 pub mod RW {
4342 #[doc = "Channel n can suspend a lower priority channel."]
4343 pub const DPA_0: u8 = 0;
4344 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4345 pub const DPA_1: u8 = 0x01;
4346 }
4347 }
4348 #[doc = "Enable Channel Preemption. This field resets to 0."]
4349 pub mod ECP {
4350 pub const offset: u8 = 7;
4351 pub const mask: u8 = 0x01 << offset;
4352 pub mod R {}
4353 pub mod W {}
4354 pub mod RW {
4355 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4356 pub const ECP_0: u8 = 0;
4357 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4358 pub const ECP_1: u8 = 0x01;
4359 }
4360 }
4361}
4362#[doc = "Channel n Priority Register"]
4363pub mod DCHPRI26 {
4364 #[doc = "Channel n Arbitration Priority"]
4365 pub mod CHPRI {
4366 pub const offset: u8 = 0;
4367 pub const mask: u8 = 0x0f << offset;
4368 pub mod R {}
4369 pub mod W {}
4370 pub mod RW {}
4371 }
4372 #[doc = "Channel n Current Group Priority"]
4373 pub mod GRPPRI {
4374 pub const offset: u8 = 4;
4375 pub const mask: u8 = 0x03 << offset;
4376 pub mod R {}
4377 pub mod W {}
4378 pub mod RW {}
4379 }
4380 #[doc = "Disable Preempt Ability. This field resets to 0."]
4381 pub mod DPA {
4382 pub const offset: u8 = 6;
4383 pub const mask: u8 = 0x01 << offset;
4384 pub mod R {}
4385 pub mod W {}
4386 pub mod RW {
4387 #[doc = "Channel n can suspend a lower priority channel."]
4388 pub const DPA_0: u8 = 0;
4389 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4390 pub const DPA_1: u8 = 0x01;
4391 }
4392 }
4393 #[doc = "Enable Channel Preemption. This field resets to 0."]
4394 pub mod ECP {
4395 pub const offset: u8 = 7;
4396 pub const mask: u8 = 0x01 << offset;
4397 pub mod R {}
4398 pub mod W {}
4399 pub mod RW {
4400 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4401 pub const ECP_0: u8 = 0;
4402 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4403 pub const ECP_1: u8 = 0x01;
4404 }
4405 }
4406}
4407#[doc = "Channel n Priority Register"]
4408pub mod DCHPRI25 {
4409 #[doc = "Channel n Arbitration Priority"]
4410 pub mod CHPRI {
4411 pub const offset: u8 = 0;
4412 pub const mask: u8 = 0x0f << offset;
4413 pub mod R {}
4414 pub mod W {}
4415 pub mod RW {}
4416 }
4417 #[doc = "Channel n Current Group Priority"]
4418 pub mod GRPPRI {
4419 pub const offset: u8 = 4;
4420 pub const mask: u8 = 0x03 << offset;
4421 pub mod R {}
4422 pub mod W {}
4423 pub mod RW {}
4424 }
4425 #[doc = "Disable Preempt Ability. This field resets to 0."]
4426 pub mod DPA {
4427 pub const offset: u8 = 6;
4428 pub const mask: u8 = 0x01 << offset;
4429 pub mod R {}
4430 pub mod W {}
4431 pub mod RW {
4432 #[doc = "Channel n can suspend a lower priority channel."]
4433 pub const DPA_0: u8 = 0;
4434 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4435 pub const DPA_1: u8 = 0x01;
4436 }
4437 }
4438 #[doc = "Enable Channel Preemption. This field resets to 0."]
4439 pub mod ECP {
4440 pub const offset: u8 = 7;
4441 pub const mask: u8 = 0x01 << offset;
4442 pub mod R {}
4443 pub mod W {}
4444 pub mod RW {
4445 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4446 pub const ECP_0: u8 = 0;
4447 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4448 pub const ECP_1: u8 = 0x01;
4449 }
4450 }
4451}
4452#[doc = "Channel n Priority Register"]
4453pub mod DCHPRI24 {
4454 #[doc = "Channel n Arbitration Priority"]
4455 pub mod CHPRI {
4456 pub const offset: u8 = 0;
4457 pub const mask: u8 = 0x0f << offset;
4458 pub mod R {}
4459 pub mod W {}
4460 pub mod RW {}
4461 }
4462 #[doc = "Channel n Current Group Priority"]
4463 pub mod GRPPRI {
4464 pub const offset: u8 = 4;
4465 pub const mask: u8 = 0x03 << offset;
4466 pub mod R {}
4467 pub mod W {}
4468 pub mod RW {}
4469 }
4470 #[doc = "Disable Preempt Ability. This field resets to 0."]
4471 pub mod DPA {
4472 pub const offset: u8 = 6;
4473 pub const mask: u8 = 0x01 << offset;
4474 pub mod R {}
4475 pub mod W {}
4476 pub mod RW {
4477 #[doc = "Channel n can suspend a lower priority channel."]
4478 pub const DPA_0: u8 = 0;
4479 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4480 pub const DPA_1: u8 = 0x01;
4481 }
4482 }
4483 #[doc = "Enable Channel Preemption. This field resets to 0."]
4484 pub mod ECP {
4485 pub const offset: u8 = 7;
4486 pub const mask: u8 = 0x01 << offset;
4487 pub mod R {}
4488 pub mod W {}
4489 pub mod RW {
4490 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4491 pub const ECP_0: u8 = 0;
4492 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4493 pub const ECP_1: u8 = 0x01;
4494 }
4495 }
4496}
4497#[doc = "Channel n Priority Register"]
4498pub mod DCHPRI31 {
4499 #[doc = "Channel n Arbitration Priority"]
4500 pub mod CHPRI {
4501 pub const offset: u8 = 0;
4502 pub const mask: u8 = 0x0f << offset;
4503 pub mod R {}
4504 pub mod W {}
4505 pub mod RW {}
4506 }
4507 #[doc = "Channel n Current Group Priority"]
4508 pub mod GRPPRI {
4509 pub const offset: u8 = 4;
4510 pub const mask: u8 = 0x03 << offset;
4511 pub mod R {}
4512 pub mod W {}
4513 pub mod RW {}
4514 }
4515 #[doc = "Disable Preempt Ability. This field resets to 0."]
4516 pub mod DPA {
4517 pub const offset: u8 = 6;
4518 pub const mask: u8 = 0x01 << offset;
4519 pub mod R {}
4520 pub mod W {}
4521 pub mod RW {
4522 #[doc = "Channel n can suspend a lower priority channel."]
4523 pub const DPA_0: u8 = 0;
4524 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4525 pub const DPA_1: u8 = 0x01;
4526 }
4527 }
4528 #[doc = "Enable Channel Preemption. This field resets to 0."]
4529 pub mod ECP {
4530 pub const offset: u8 = 7;
4531 pub const mask: u8 = 0x01 << offset;
4532 pub mod R {}
4533 pub mod W {}
4534 pub mod RW {
4535 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4536 pub const ECP_0: u8 = 0;
4537 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4538 pub const ECP_1: u8 = 0x01;
4539 }
4540 }
4541}
4542#[doc = "Channel n Priority Register"]
4543pub mod DCHPRI30 {
4544 #[doc = "Channel n Arbitration Priority"]
4545 pub mod CHPRI {
4546 pub const offset: u8 = 0;
4547 pub const mask: u8 = 0x0f << offset;
4548 pub mod R {}
4549 pub mod W {}
4550 pub mod RW {}
4551 }
4552 #[doc = "Channel n Current Group Priority"]
4553 pub mod GRPPRI {
4554 pub const offset: u8 = 4;
4555 pub const mask: u8 = 0x03 << offset;
4556 pub mod R {}
4557 pub mod W {}
4558 pub mod RW {}
4559 }
4560 #[doc = "Disable Preempt Ability. This field resets to 0."]
4561 pub mod DPA {
4562 pub const offset: u8 = 6;
4563 pub const mask: u8 = 0x01 << offset;
4564 pub mod R {}
4565 pub mod W {}
4566 pub mod RW {
4567 #[doc = "Channel n can suspend a lower priority channel."]
4568 pub const DPA_0: u8 = 0;
4569 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4570 pub const DPA_1: u8 = 0x01;
4571 }
4572 }
4573 #[doc = "Enable Channel Preemption. This field resets to 0."]
4574 pub mod ECP {
4575 pub const offset: u8 = 7;
4576 pub const mask: u8 = 0x01 << offset;
4577 pub mod R {}
4578 pub mod W {}
4579 pub mod RW {
4580 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4581 pub const ECP_0: u8 = 0;
4582 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4583 pub const ECP_1: u8 = 0x01;
4584 }
4585 }
4586}
4587#[doc = "Channel n Priority Register"]
4588pub mod DCHPRI29 {
4589 #[doc = "Channel n Arbitration Priority"]
4590 pub mod CHPRI {
4591 pub const offset: u8 = 0;
4592 pub const mask: u8 = 0x0f << offset;
4593 pub mod R {}
4594 pub mod W {}
4595 pub mod RW {}
4596 }
4597 #[doc = "Channel n Current Group Priority"]
4598 pub mod GRPPRI {
4599 pub const offset: u8 = 4;
4600 pub const mask: u8 = 0x03 << offset;
4601 pub mod R {}
4602 pub mod W {}
4603 pub mod RW {}
4604 }
4605 #[doc = "Disable Preempt Ability. This field resets to 0."]
4606 pub mod DPA {
4607 pub const offset: u8 = 6;
4608 pub const mask: u8 = 0x01 << offset;
4609 pub mod R {}
4610 pub mod W {}
4611 pub mod RW {
4612 #[doc = "Channel n can suspend a lower priority channel."]
4613 pub const DPA_0: u8 = 0;
4614 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4615 pub const DPA_1: u8 = 0x01;
4616 }
4617 }
4618 #[doc = "Enable Channel Preemption. This field resets to 0."]
4619 pub mod ECP {
4620 pub const offset: u8 = 7;
4621 pub const mask: u8 = 0x01 << offset;
4622 pub mod R {}
4623 pub mod W {}
4624 pub mod RW {
4625 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4626 pub const ECP_0: u8 = 0;
4627 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4628 pub const ECP_1: u8 = 0x01;
4629 }
4630 }
4631}
4632#[doc = "Channel n Priority Register"]
4633pub mod DCHPRI28 {
4634 #[doc = "Channel n Arbitration Priority"]
4635 pub mod CHPRI {
4636 pub const offset: u8 = 0;
4637 pub const mask: u8 = 0x0f << offset;
4638 pub mod R {}
4639 pub mod W {}
4640 pub mod RW {}
4641 }
4642 #[doc = "Channel n Current Group Priority"]
4643 pub mod GRPPRI {
4644 pub const offset: u8 = 4;
4645 pub const mask: u8 = 0x03 << offset;
4646 pub mod R {}
4647 pub mod W {}
4648 pub mod RW {}
4649 }
4650 #[doc = "Disable Preempt Ability. This field resets to 0."]
4651 pub mod DPA {
4652 pub const offset: u8 = 6;
4653 pub const mask: u8 = 0x01 << offset;
4654 pub mod R {}
4655 pub mod W {}
4656 pub mod RW {
4657 #[doc = "Channel n can suspend a lower priority channel."]
4658 pub const DPA_0: u8 = 0;
4659 #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
4660 pub const DPA_1: u8 = 0x01;
4661 }
4662 }
4663 #[doc = "Enable Channel Preemption. This field resets to 0."]
4664 pub mod ECP {
4665 pub const offset: u8 = 7;
4666 pub const mask: u8 = 0x01 << offset;
4667 pub mod R {}
4668 pub mod W {}
4669 pub mod RW {
4670 #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
4671 pub const ECP_0: u8 = 0;
4672 #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
4673 pub const ECP_1: u8 = 0x01;
4674 }
4675 }
4676}
4677pub mod tcd {
4678 #[doc = "Cluster TCD%s, containing TCD*_SADDR, TCD*_SOFF, TCD*_ATTR, TCD*_NBYTES_MLNO, TCD*_NBYTES_MLOFFNO, TCD*_NBYTES_MLOFFYES, TCD*_SLAST, TCD*_DADDR, TCD*_DOFF, TCD*_CITER_ELINKNO, TCD*_CITER_ELINKYES, TCD*_DLASTSGA, TCD*_CSR, TCD*_BITER_ELINKNO, TCD*_BITER_ELINKYES"]
4679 #[repr(C)]
4680 pub struct RegisterBlock {
4681 #[doc = "TCD Source Address"]
4682 pub TCD_SADDR: crate::RWRegister<u32>,
4683 #[doc = "TCD Signed Source Address Offset"]
4684 pub TCD_SOFF: crate::RWRegister<u16>,
4685 #[doc = "TCD Transfer Attributes"]
4686 pub TCD_ATTR: crate::RWRegister<u16>,
4687 #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
4688 pub TCD_NBYTES_MLNO: crate::RWRegister<u32>,
4689 #[doc = "TCD Last Source Address Adjustment"]
4690 pub TCD_SLAST: crate::RWRegister<u32>,
4691 #[doc = "TCD Destination Address"]
4692 pub TCD_DADDR: crate::RWRegister<u32>,
4693 #[doc = "TCD Signed Destination Address Offset"]
4694 pub TCD_DOFF: crate::RWRegister<u16>,
4695 #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
4696 pub TCD_CITER_ELINKNO: crate::RWRegister<u16>,
4697 #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
4698 pub TCD_DLASTSGA: crate::RWRegister<u32>,
4699 #[doc = "TCD Control and Status"]
4700 pub TCD_CSR: crate::RWRegister<u16>,
4701 #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
4702 pub TCD_BITER_ELINKNO: crate::RWRegister<u16>,
4703 }
4704 #[doc = "TCD Source Address"]
4705 pub mod TCD_SADDR {
4706 #[doc = "Source Address"]
4707 pub mod SADDR {
4708 pub const offset: u32 = 0;
4709 pub const mask: u32 = 0xffff_ffff << offset;
4710 pub mod R {}
4711 pub mod W {}
4712 pub mod RW {}
4713 }
4714 }
4715 #[doc = "TCD Signed Source Address Offset"]
4716 pub mod TCD_SOFF {
4717 #[doc = "Source address signed offset"]
4718 pub mod SOFF {
4719 pub const offset: u16 = 0;
4720 pub const mask: u16 = 0xffff << offset;
4721 pub mod R {}
4722 pub mod W {}
4723 pub mod RW {}
4724 }
4725 }
4726 #[doc = "TCD Transfer Attributes"]
4727 pub mod TCD_ATTR {
4728 #[doc = "Destination data transfer size"]
4729 pub mod DSIZE {
4730 pub const offset: u16 = 0;
4731 pub const mask: u16 = 0x07 << offset;
4732 pub mod R {}
4733 pub mod W {}
4734 pub mod RW {}
4735 }
4736 #[doc = "Destination Address Modulo"]
4737 pub mod DMOD {
4738 pub const offset: u16 = 3;
4739 pub const mask: u16 = 0x1f << offset;
4740 pub mod R {}
4741 pub mod W {}
4742 pub mod RW {}
4743 }
4744 #[doc = "Source data transfer size"]
4745 pub mod SSIZE {
4746 pub const offset: u16 = 8;
4747 pub const mask: u16 = 0x07 << offset;
4748 pub mod R {}
4749 pub mod W {}
4750 pub mod RW {
4751 #[doc = "8-bit"]
4752 pub const SSIZE_0: u16 = 0;
4753 #[doc = "16-bit"]
4754 pub const SSIZE_1: u16 = 0x01;
4755 #[doc = "32-bit"]
4756 pub const SSIZE_2: u16 = 0x02;
4757 #[doc = "64-bit"]
4758 pub const SSIZE_3: u16 = 0x03;
4759 #[doc = "32-byte burst (4 beats of 64 bits)"]
4760 pub const SSIZE_5: u16 = 0x05;
4761 }
4762 }
4763 #[doc = "Source Address Modulo"]
4764 pub mod SMOD {
4765 pub const offset: u16 = 11;
4766 pub const mask: u16 = 0x1f << offset;
4767 pub mod R {}
4768 pub mod W {}
4769 pub mod RW {
4770 #[doc = "Source address modulo feature is disabled"]
4771 pub const SMOD_0: u16 = 0;
4772 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4773 pub const SMOD_1: u16 = 0x01;
4774 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4775 pub const SMOD_2: u16 = 0x02;
4776 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4777 pub const SMOD_3: u16 = 0x03;
4778 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4779 pub const SMOD_4: u16 = 0x04;
4780 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4781 pub const SMOD_5: u16 = 0x05;
4782 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4783 pub const SMOD_6: u16 = 0x06;
4784 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4785 pub const SMOD_7: u16 = 0x07;
4786 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4787 pub const SMOD_8: u16 = 0x08;
4788 #[doc = "This value defines a specific address range specified to be the value after SADDR + SOFF calculation is performed on the original register value. Setting this field provides the ability to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value for the queue, freezing the desired number of upper address bits. The value programmed into this field specifies the number of lower address bits allowed to change. For a circular queue application, the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD function constraining the addresses to a 0-modulo-size range."]
4789 pub const SMOD_9: u16 = 0x09;
4790 }
4791 }
4792 }
4793 #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
4794 pub mod TCD_NBYTES_MLNO {
4795 #[doc = "Minor Byte Transfer Count"]
4796 pub mod NBYTES {
4797 pub const offset: u32 = 0;
4798 pub const mask: u32 = 0xffff_ffff << offset;
4799 pub mod R {}
4800 pub mod W {}
4801 pub mod RW {}
4802 }
4803 }
4804 #[doc = "TCD Last Source Address Adjustment"]
4805 pub mod TCD_SLAST {
4806 #[doc = "Last Source Address Adjustment"]
4807 pub mod SLAST {
4808 pub const offset: u32 = 0;
4809 pub const mask: u32 = 0xffff_ffff << offset;
4810 pub mod R {}
4811 pub mod W {}
4812 pub mod RW {}
4813 }
4814 }
4815 #[doc = "TCD Destination Address"]
4816 pub mod TCD_DADDR {
4817 #[doc = "Destination Address"]
4818 pub mod DADDR {
4819 pub const offset: u32 = 0;
4820 pub const mask: u32 = 0xffff_ffff << offset;
4821 pub mod R {}
4822 pub mod W {}
4823 pub mod RW {}
4824 }
4825 }
4826 #[doc = "TCD Signed Destination Address Offset"]
4827 pub mod TCD_DOFF {
4828 #[doc = "Destination Address Signed Offset"]
4829 pub mod DOFF {
4830 pub const offset: u16 = 0;
4831 pub const mask: u16 = 0xffff << offset;
4832 pub mod R {}
4833 pub mod W {}
4834 pub mod RW {}
4835 }
4836 }
4837 #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
4838 pub mod TCD_CITER_ELINKNO {
4839 #[doc = "Current Major Iteration Count"]
4840 pub mod CITER {
4841 pub const offset: u16 = 0;
4842 pub const mask: u16 = 0x7fff << offset;
4843 pub mod R {}
4844 pub mod W {}
4845 pub mod RW {}
4846 }
4847 #[doc = "Enable channel-to-channel linking on minor-loop complete"]
4848 pub mod ELINK {
4849 pub const offset: u16 = 15;
4850 pub const mask: u16 = 0x01 << offset;
4851 pub mod R {}
4852 pub mod W {}
4853 pub mod RW {
4854 #[doc = "The channel-to-channel linking is disabled"]
4855 pub const ELINK_0: u16 = 0;
4856 #[doc = "The channel-to-channel linking is enabled"]
4857 pub const ELINK_1: u16 = 0x01;
4858 }
4859 }
4860 }
4861 #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
4862 pub mod TCD_DLASTSGA {
4863 #[doc = "DLASTSGA"]
4864 pub mod DLASTSGA {
4865 pub const offset: u32 = 0;
4866 pub const mask: u32 = 0xffff_ffff << offset;
4867 pub mod R {}
4868 pub mod W {}
4869 pub mod RW {}
4870 }
4871 }
4872 #[doc = "TCD Control and Status"]
4873 pub mod TCD_CSR {
4874 #[doc = "Channel Start"]
4875 pub mod START {
4876 pub const offset: u16 = 0;
4877 pub const mask: u16 = 0x01 << offset;
4878 pub mod R {}
4879 pub mod W {}
4880 pub mod RW {
4881 #[doc = "The channel is not explicitly started."]
4882 pub const START_0: u16 = 0;
4883 #[doc = "The channel is explicitly started via a software initiated service request."]
4884 pub const START_1: u16 = 0x01;
4885 }
4886 }
4887 #[doc = "Enable an interrupt when major iteration count completes."]
4888 pub mod INTMAJOR {
4889 pub const offset: u16 = 1;
4890 pub const mask: u16 = 0x01 << offset;
4891 pub mod R {}
4892 pub mod W {}
4893 pub mod RW {
4894 #[doc = "The end-of-major loop interrupt is disabled."]
4895 pub const INTMAJOR_0: u16 = 0;
4896 #[doc = "The end-of-major loop interrupt is enabled."]
4897 pub const INTMAJOR_1: u16 = 0x01;
4898 }
4899 }
4900 #[doc = "Enable an interrupt when major counter is half complete."]
4901 pub mod INTHALF {
4902 pub const offset: u16 = 2;
4903 pub const mask: u16 = 0x01 << offset;
4904 pub mod R {}
4905 pub mod W {}
4906 pub mod RW {
4907 #[doc = "The half-point interrupt is disabled."]
4908 pub const INTHALF_0: u16 = 0;
4909 #[doc = "The half-point interrupt is enabled."]
4910 pub const INTHALF_1: u16 = 0x01;
4911 }
4912 }
4913 #[doc = "Disable Request"]
4914 pub mod DREQ {
4915 pub const offset: u16 = 3;
4916 pub const mask: u16 = 0x01 << offset;
4917 pub mod R {}
4918 pub mod W {}
4919 pub mod RW {
4920 #[doc = "The channel's ERQ bit is not affected."]
4921 pub const DREQ_0: u16 = 0;
4922 #[doc = "The channel's ERQ bit is cleared when the major loop is complete."]
4923 pub const DREQ_1: u16 = 0x01;
4924 }
4925 }
4926 #[doc = "Enable Scatter/Gather Processing"]
4927 pub mod ESG {
4928 pub const offset: u16 = 4;
4929 pub const mask: u16 = 0x01 << offset;
4930 pub mod R {}
4931 pub mod W {}
4932 pub mod RW {
4933 #[doc = "The current channel's TCD is normal format."]
4934 pub const ESG_0: u16 = 0;
4935 #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
4936 pub const ESG_1: u16 = 0x01;
4937 }
4938 }
4939 #[doc = "Enable channel-to-channel linking on major loop complete"]
4940 pub mod MAJORELINK {
4941 pub const offset: u16 = 5;
4942 pub const mask: u16 = 0x01 << offset;
4943 pub mod R {}
4944 pub mod W {}
4945 pub mod RW {
4946 #[doc = "The channel-to-channel linking is disabled."]
4947 pub const MAJORELINK_0: u16 = 0;
4948 #[doc = "The channel-to-channel linking is enabled."]
4949 pub const MAJORELINK_1: u16 = 0x01;
4950 }
4951 }
4952 #[doc = "Channel Active"]
4953 pub mod ACTIVE {
4954 pub const offset: u16 = 6;
4955 pub const mask: u16 = 0x01 << offset;
4956 pub mod R {}
4957 pub mod W {}
4958 pub mod RW {}
4959 }
4960 #[doc = "Channel Done"]
4961 pub mod DONE {
4962 pub const offset: u16 = 7;
4963 pub const mask: u16 = 0x01 << offset;
4964 pub mod R {}
4965 pub mod W {}
4966 pub mod RW {}
4967 }
4968 #[doc = "Major Loop Link Channel Number"]
4969 pub mod MAJORLINKCH {
4970 pub const offset: u16 = 8;
4971 pub const mask: u16 = 0x1f << offset;
4972 pub mod R {}
4973 pub mod W {}
4974 pub mod RW {}
4975 }
4976 #[doc = "Bandwidth Control"]
4977 pub mod BWC {
4978 pub const offset: u16 = 14;
4979 pub const mask: u16 = 0x03 << offset;
4980 pub mod R {}
4981 pub mod W {}
4982 pub mod RW {
4983 #[doc = "No eDMA engine stalls."]
4984 pub const BWC_0: u16 = 0;
4985 #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
4986 pub const BWC_2: u16 = 0x02;
4987 #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
4988 pub const BWC_3: u16 = 0x03;
4989 }
4990 }
4991 }
4992 #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
4993 pub mod TCD_BITER_ELINKNO {
4994 #[doc = "Starting Major Iteration Count"]
4995 pub mod BITER {
4996 pub const offset: u16 = 0;
4997 pub const mask: u16 = 0x7fff << offset;
4998 pub mod R {}
4999 pub mod W {}
5000 pub mod RW {}
5001 }
5002 #[doc = "Enables channel-to-channel linking on minor loop complete"]
5003 pub mod ELINK {
5004 pub const offset: u16 = 15;
5005 pub const mask: u16 = 0x01 << offset;
5006 pub mod R {}
5007 pub mod W {}
5008 pub mod RW {
5009 #[doc = "The channel-to-channel linking is disabled"]
5010 pub const ELINK_0: u16 = 0;
5011 #[doc = "The channel-to-channel linking is enabled"]
5012 pub const ELINK_1: u16 = 0x01;
5013 }
5014 }
5015 }
5016}