#[doc = "CAN"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "Module Configuration Register"]
pub MCR: crate::RWRegister<u32>,
#[doc = "Control 1 register"]
pub CTRL1: crate::RWRegister<u32>,
#[doc = "Free Running Timer"]
pub TIMER: crate::RWRegister<u32>,
_reserved0: [u8; 0x04],
#[doc = "Rx Mailboxes Global Mask Register"]
pub RXMGMASK: crate::RWRegister<u32>,
#[doc = "Rx 14 Mask register"]
pub RX14MASK: crate::RWRegister<u32>,
#[doc = "Rx 15 Mask register"]
pub RX15MASK: crate::RWRegister<u32>,
#[doc = "Error Counter"]
pub ECR: crate::RWRegister<u32>,
#[doc = "Error and Status 1 register"]
pub ESR1: crate::RWRegister<u32>,
#[doc = "Interrupt Masks 2 register"]
pub IMASK2: crate::RWRegister<u32>,
#[doc = "Interrupt Masks 1 register"]
pub IMASK1: crate::RWRegister<u32>,
#[doc = "Interrupt Flags 2 register"]
pub IFLAG2: crate::RWRegister<u32>,
#[doc = "Interrupt Flags 1 register"]
pub IFLAG1: crate::RWRegister<u32>,
#[doc = "Control 2 register"]
pub CTRL2: crate::RWRegister<u32>,
#[doc = "Error and Status 2 register"]
pub ESR2: crate::RORegister<u32>,
_reserved1: [u8; 0x08],
#[doc = "CRC Register"]
pub CRCR: crate::RORegister<u32>,
#[doc = "Legacy Rx FIFO Global Mask register"]
pub RXFGMASK: crate::RWRegister<u32>,
#[doc = "Legacy Rx FIFO Information Register"]
pub RXFIR: crate::RORegister<u32>,
#[doc = "CAN Bit Timing Register"]
pub CBT: crate::RWRegister<u32>,
_reserved2: [u8; 0x2c],
#[doc = "Message Buffer 0 CS Register"]
pub CS0: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 ID Register"]
pub ID0: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 WORD_16B Register"]
pub MB0_16B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 WORD_16B Register"]
pub MB0_16B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 CS Register"]
pub CS1: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 ID Register"]
pub ID1: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 WORD_32B Register"]
pub MB0_32B_WORD4: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 WORD_32B Register"]
pub MB0_32B_WORD5: crate::RWRegister<u32>,
#[doc = "Message Buffer 2 CS Register"]
pub CS2: crate::RWRegister<u32>,
#[doc = "Message Buffer 2 ID Register"]
pub ID2: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 WORD_64B Register"]
pub MB0_64B_WORD8: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 WORD_64B Register"]
pub MB0_64B_WORD9: crate::RWRegister<u32>,
#[doc = "Message Buffer 3 CS Register"]
pub CS3: crate::RWRegister<u32>,
#[doc = "Message Buffer 3 ID Register"]
pub ID3: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 WORD_64B Register"]
pub MB0_64B_WORD12: crate::RWRegister<u32>,
#[doc = "Message Buffer 0 WORD_64B Register"]
pub MB0_64B_WORD13: crate::RWRegister<u32>,
#[doc = "Message Buffer 4 CS Register"]
pub CS4: crate::RWRegister<u32>,
#[doc = "Message Buffer 4 ID Register"]
pub ID4: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_32B Register"]
pub MB1_32B_WORD6: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_32B Register"]
pub MB1_32B_WORD7: crate::RWRegister<u32>,
#[doc = "Message Buffer 5 CS Register"]
pub CS5: crate::RWRegister<u32>,
#[doc = "Message Buffer 5 ID Register"]
pub ID5: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_64B Register"]
pub MB1_64B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_64B Register"]
pub MB1_64B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 6 CS Register"]
pub CS6: crate::RWRegister<u32>,
#[doc = "Message Buffer 6 ID Register"]
pub ID6: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_64B Register"]
pub MB1_64B_WORD6: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_64B Register"]
pub MB1_64B_WORD7: crate::RWRegister<u32>,
#[doc = "Message Buffer 7 CS Register"]
pub CS7: crate::RWRegister<u32>,
#[doc = "Message Buffer 7 ID Register"]
pub ID7: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_64B Register"]
pub MB1_64B_WORD10: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_64B Register"]
pub MB1_64B_WORD11: crate::RWRegister<u32>,
#[doc = "Message Buffer 8 CS Register"]
pub CS8: crate::RWRegister<u32>,
#[doc = "Message Buffer 8 ID Register"]
pub ID8: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_64B Register"]
pub MB1_64B_WORD14: crate::RWRegister<u32>,
#[doc = "Message Buffer 1 WORD_64B Register"]
pub MB1_64B_WORD15: crate::RWRegister<u32>,
#[doc = "Message Buffer 9 CS Register"]
pub CS9: crate::RWRegister<u32>,
#[doc = "Message Buffer 9 ID Register"]
pub ID9: crate::RWRegister<u32>,
#[doc = "Message Buffer 2 WORD_64B Register"]
pub MB2_64B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 2 WORD_64B Register"]
pub MB2_64B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 CS Register"]
pub CS10: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 ID Register"]
pub ID10: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_8B Register"]
pub MB10_8B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_8B Register"]
pub MB10_8B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 CS Register"]
pub CS11: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 ID Register"]
pub ID11: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_8B Register"]
pub MB11_8B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_8B Register"]
pub MB11_8B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 CS Register"]
pub CS12: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 ID Register"]
pub ID12: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_8B Register"]
pub MB12_8B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_8B Register"]
pub MB12_8B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 CS Register"]
pub CS13: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 ID Register"]
pub ID13: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_8B Register"]
pub MB13_8B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_8B Register"]
pub MB13_8B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 CS Register"]
pub CS14: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 ID Register"]
pub ID14: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 WORD_8B Register"]
pub MB14_8B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 WORD_8B Register"]
pub MB14_8B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 CS Register"]
pub CS15: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 ID Register"]
pub ID15: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_16B Register"]
pub MB10_16B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_16B Register"]
pub MB10_16B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 16 CS Register"]
pub CS16: crate::RWRegister<u32>,
#[doc = "Message Buffer 16 ID Register"]
pub ID16: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 CS Register"]
pub MB11_16B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 ID Register"]
pub MB11_16B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 17 CS Register"]
pub CS17: crate::RWRegister<u32>,
#[doc = "Message Buffer 17 ID Register"]
pub ID17: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_16B Register"]
pub MB11_16B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_16B Register"]
pub MB11_16B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 18 CS Register"]
pub CS18: crate::RWRegister<u32>,
#[doc = "Message Buffer 18 ID Register"]
pub ID18: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_16B Register"]
pub MB12_16B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_16B Register"]
pub MB12_16B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 19 CS Register"]
pub CS19: crate::RWRegister<u32>,
#[doc = "Message Buffer 19 ID Register"]
pub ID19: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 CS Register"]
pub MB13_16B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 ID Register"]
pub MB13_16B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 20 CS Register"]
pub CS20: crate::RWRegister<u32>,
#[doc = "Message Buffer 20 ID Register"]
pub ID20: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_16B Register"]
pub MB13_16B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_16B Register"]
pub MB13_16B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 21 CS Register"]
pub CS21: crate::RWRegister<u32>,
#[doc = "Message Buffer 21 ID Register"]
pub ID21: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 WORD_16B Register"]
pub MB14_16B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 WORD_16B Register"]
pub MB14_16B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 22 CS Register"]
pub CS22: crate::RWRegister<u32>,
#[doc = "Message Buffer 22 ID Register"]
pub ID22: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 CS Register"]
pub MB15_16B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 ID Register"]
pub MB15_16B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 23 CS Register"]
pub CS23: crate::RWRegister<u32>,
#[doc = "Message Buffer 23 ID Register"]
pub ID23: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 WORD_16B Register"]
pub MB15_16B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 WORD_16B Register"]
pub MB15_16B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 24 CS Register"]
pub CS24: crate::RWRegister<u32>,
#[doc = "Message Buffer 24 ID Register"]
pub ID24: crate::RWRegister<u32>,
#[doc = "Message Buffer 16 WORD_16B Register"]
pub MB16_16B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 16 WORD_16B Register"]
pub MB16_16B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 25 CS Register"]
pub CS25: crate::RWRegister<u32>,
#[doc = "Message Buffer 25 ID Register"]
pub ID25: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_32B Register"]
pub MB10_32B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_32B Register"]
pub MB10_32B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 26 CS Register"]
pub CS26: crate::RWRegister<u32>,
#[doc = "Message Buffer 26 ID Register"]
pub ID26: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_32B Register"]
pub MB10_32B_WORD4: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_32B Register"]
pub MB10_32B_WORD5: crate::RWRegister<u32>,
#[doc = "Message Buffer 27 CS Register"]
pub CS27: crate::RWRegister<u32>,
#[doc = "Message Buffer 27 ID Register"]
pub ID27: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 CS Register"]
pub MB11_32B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 ID Register"]
pub MB11_32B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 28 CS Register"]
pub CS28: crate::RWRegister<u32>,
#[doc = "Message Buffer 28 ID Register"]
pub ID28: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_32B Register"]
pub MB11_32B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_32B Register"]
pub MB11_32B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 29 CS Register"]
pub CS29: crate::RWRegister<u32>,
#[doc = "Message Buffer 29 ID Register"]
pub ID29: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_32B Register"]
pub MB11_32B_WORD6: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_32B Register"]
pub MB11_32B_WORD7: crate::RWRegister<u32>,
#[doc = "Message Buffer 30 CS Register"]
pub CS30: crate::RWRegister<u32>,
#[doc = "Message Buffer 30 ID Register"]
pub ID30: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_32B Register"]
pub MB12_32B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_32B Register"]
pub MB12_32B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 31 CS Register"]
pub CS31: crate::RWRegister<u32>,
#[doc = "Message Buffer 31 ID Register"]
pub ID31: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_32B Register"]
pub MB12_32B_WORD4: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_32B Register"]
pub MB12_32B_WORD5: crate::RWRegister<u32>,
#[doc = "Message Buffer 32 CS Register"]
pub CS32: crate::RWRegister<u32>,
#[doc = "Message Buffer 32 ID Register"]
pub ID32: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 CS Register"]
pub MB13_32B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 ID Register"]
pub MB13_32B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 33 CS Register"]
pub CS33: crate::RWRegister<u32>,
#[doc = "Message Buffer 33 ID Register"]
pub ID33: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_32B Register"]
pub MB13_32B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_32B Register"]
pub MB13_32B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 34 CS Register"]
pub CS34: crate::RWRegister<u32>,
#[doc = "Message Buffer 34 ID Register"]
pub ID34: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_32B Register"]
pub MB13_32B_WORD6: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_32B Register"]
pub MB13_32B_WORD7: crate::RWRegister<u32>,
#[doc = "Message Buffer 35 CS Register"]
pub CS35: crate::RWRegister<u32>,
#[doc = "Message Buffer 35 ID Register"]
pub ID35: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 WORD_32B Register"]
pub MB14_32B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 WORD_32B Register"]
pub MB14_32B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 36 CS Register"]
pub CS36: crate::RWRegister<u32>,
#[doc = "Message Buffer 36 ID Register"]
pub ID36: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 WORD_32B Register"]
pub MB14_32B_WORD4: crate::RWRegister<u32>,
#[doc = "Message Buffer 14 WORD_32B Register"]
pub MB14_32B_WORD5: crate::RWRegister<u32>,
#[doc = "Message Buffer 37 CS Register"]
pub CS37: crate::RWRegister<u32>,
#[doc = "Message Buffer 37 ID Register"]
pub ID37: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 CS Register"]
pub MB15_32B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 ID Register"]
pub MB15_32B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 38 CS Register"]
pub CS38: crate::RWRegister<u32>,
#[doc = "Message Buffer 38 ID Register"]
pub ID38: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 WORD_32B Register"]
pub MB15_32B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 WORD_32B Register"]
pub MB15_32B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 39 CS Register"]
pub CS39: crate::RWRegister<u32>,
#[doc = "Message Buffer 39 ID Register"]
pub ID39: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 WORD_32B Register"]
pub MB15_32B_WORD6: crate::RWRegister<u32>,
#[doc = "Message Buffer 15 WORD_32B Register"]
pub MB15_32B_WORD7: crate::RWRegister<u32>,
#[doc = "Message Buffer 40 CS Register"]
pub CS40: crate::RWRegister<u32>,
#[doc = "Message Buffer 40 ID Register"]
pub ID40: crate::RWRegister<u32>,
#[doc = "Message Buffer 16 WORD_32B Register"]
pub MB16_32B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 16 WORD_32B Register"]
pub MB16_32B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 41 CS Register"]
pub CS41: crate::RWRegister<u32>,
#[doc = "Message Buffer 41 ID Register"]
pub ID41: crate::RWRegister<u32>,
#[doc = "Message Buffer 16 WORD_32B Register"]
pub MB16_32B_WORD4: crate::RWRegister<u32>,
#[doc = "Message Buffer 16 WORD_32B Register"]
pub MB16_32B_WORD5: crate::RWRegister<u32>,
#[doc = "Message Buffer 42 CS Register"]
pub CS42: crate::RWRegister<u32>,
#[doc = "Message Buffer 42 ID Register"]
pub ID42: crate::RWRegister<u32>,
#[doc = "Message Buffer 17 CS Register"]
pub MB17_32B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 17 ID Register"]
pub MB17_32B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 43 CS Register"]
pub CS43: crate::RWRegister<u32>,
#[doc = "Message Buffer 43 ID Register"]
pub ID43: crate::RWRegister<u32>,
#[doc = "Message Buffer 17 WORD_32B Register"]
pub MB17_32B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 17 WORD_32B Register"]
pub MB17_32B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 44 CS Register"]
pub CS44: crate::RWRegister<u32>,
#[doc = "Message Buffer 44 ID Register"]
pub ID44: crate::RWRegister<u32>,
#[doc = "Message Buffer 17 WORD_32B Register"]
pub MB17_32B_WORD6: crate::RWRegister<u32>,
#[doc = "Message Buffer 17 WORD_32B Register"]
pub MB17_32B_WORD7: crate::RWRegister<u32>,
#[doc = "Message Buffer 45 CS Register"]
pub CS45: crate::RWRegister<u32>,
#[doc = "Message Buffer 45 ID Register"]
pub ID45: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_64B Register"]
pub MB10_64B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_64B Register"]
pub MB10_64B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 46 CS Register"]
pub CS46: crate::RWRegister<u32>,
#[doc = "Message Buffer 46 ID Register"]
pub ID46: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_64B Register"]
pub MB10_64B_WORD4: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_64B Register"]
pub MB10_64B_WORD5: crate::RWRegister<u32>,
#[doc = "Message Buffer 47 CS Register"]
pub CS47: crate::RWRegister<u32>,
#[doc = "Message Buffer 47 ID Register"]
pub ID47: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_64B Register"]
pub MB10_64B_WORD8: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_64B Register"]
pub MB10_64B_WORD9: crate::RWRegister<u32>,
#[doc = "Message Buffer 48 CS Register"]
pub CS48: crate::RWRegister<u32>,
#[doc = "Message Buffer 48 ID Register"]
pub ID48: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_64B Register"]
pub MB10_64B_WORD12: crate::RWRegister<u32>,
#[doc = "Message Buffer 10 WORD_64B Register"]
pub MB10_64B_WORD13: crate::RWRegister<u32>,
#[doc = "Message Buffer 49 CS Register"]
pub CS49: crate::RWRegister<u32>,
#[doc = "Message Buffer 49 ID Register"]
pub ID49: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 CS Register"]
pub MB11_64B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 ID Register"]
pub MB11_64B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 50 CS Register"]
pub CS50: crate::RWRegister<u32>,
#[doc = "Message Buffer 50 ID Register"]
pub ID50: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_64B Register"]
pub MB11_64B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_64B Register"]
pub MB11_64B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 51 CS Register"]
pub CS51: crate::RWRegister<u32>,
#[doc = "Message Buffer 51 ID Register"]
pub ID51: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_64B Register"]
pub MB11_64B_WORD6: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_64B Register"]
pub MB11_64B_WORD7: crate::RWRegister<u32>,
#[doc = "Message Buffer 52 CS Register"]
pub CS52: crate::RWRegister<u32>,
#[doc = "Message Buffer 52 ID Register"]
pub ID52: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_64B Register"]
pub MB11_64B_WORD10: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_64B Register"]
pub MB11_64B_WORD11: crate::RWRegister<u32>,
#[doc = "Message Buffer 53 CS Register"]
pub CS53: crate::RWRegister<u32>,
#[doc = "Message Buffer 53 ID Register"]
pub ID53: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_64B Register"]
pub MB11_64B_WORD14: crate::RWRegister<u32>,
#[doc = "Message Buffer 11 WORD_64B Register"]
pub MB11_64B_WORD15: crate::RWRegister<u32>,
#[doc = "Message Buffer 54 CS Register"]
pub CS54: crate::RWRegister<u32>,
#[doc = "Message Buffer 54 ID Register"]
pub ID54: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_64B Register"]
pub MB12_64B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_64B Register"]
pub MB12_64B_WORD1: crate::RWRegister<u32>,
#[doc = "Message Buffer 55 CS Register"]
pub CS55: crate::RWRegister<u32>,
#[doc = "Message Buffer 55 ID Register"]
pub ID55: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_64B Register"]
pub MB12_64B_WORD4: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_64B Register"]
pub MB12_64B_WORD5: crate::RWRegister<u32>,
#[doc = "Message Buffer 56 CS Register"]
pub CS56: crate::RWRegister<u32>,
#[doc = "Message Buffer 56 ID Register"]
pub ID56: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_64B Register"]
pub MB12_64B_WORD8: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_64B Register"]
pub MB12_64B_WORD9: crate::RWRegister<u32>,
#[doc = "Message Buffer 57 CS Register"]
pub CS57: crate::RWRegister<u32>,
#[doc = "Message Buffer 57 ID Register"]
pub ID57: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_64B Register"]
pub MB12_64B_WORD12: crate::RWRegister<u32>,
#[doc = "Message Buffer 12 WORD_64B Register"]
pub MB12_64B_WORD13: crate::RWRegister<u32>,
#[doc = "Message Buffer 58 CS Register"]
pub CS58: crate::RWRegister<u32>,
#[doc = "Message Buffer 58 ID Register"]
pub ID58: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 CS Register"]
pub MB13_64B_CS: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 ID Register"]
pub MB13_64B_ID: crate::RWRegister<u32>,
#[doc = "Message Buffer 59 CS Register"]
pub CS59: crate::RWRegister<u32>,
#[doc = "Message Buffer 59 ID Register"]
pub ID59: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_64B Register"]
pub MB13_64B_WORD2: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_64B Register"]
pub MB13_64B_WORD3: crate::RWRegister<u32>,
#[doc = "Message Buffer 60 CS Register"]
pub CS60: crate::RWRegister<u32>,
#[doc = "Message Buffer 60 ID Register"]
pub ID60: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_64B Register"]
pub MB13_64B_WORD6: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_64B Register"]
pub MB13_64B_WORD7: crate::RWRegister<u32>,
#[doc = "Message Buffer 61 CS Register"]
pub CS61: crate::RWRegister<u32>,
#[doc = "Message Buffer 61 ID Register"]
pub ID61: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_64B Register"]
pub MB13_64B_WORD10: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_64B Register"]
pub MB13_64B_WORD11: crate::RWRegister<u32>,
#[doc = "Message Buffer 62 CS Register"]
pub CS62: crate::RWRegister<u32>,
#[doc = "Message Buffer 62 ID Register"]
pub ID62: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_64B Register"]
pub MB13_64B_WORD14: crate::RWRegister<u32>,
#[doc = "Message Buffer 13 WORD_64B Register"]
pub MB13_64B_WORD15: crate::RWRegister<u32>,
#[doc = "Message Buffer 63 CS Register"]
pub CS63: crate::RWRegister<u32>,
#[doc = "Message Buffer 63 ID Register"]
pub ID63: crate::RWRegister<u32>,
#[doc = "Message Buffer 63 WORD_8B Register"]
pub MB63_8B_WORD0: crate::RWRegister<u32>,
#[doc = "Message Buffer 63 WORD_8B Register"]
pub MB63_8B_WORD1: crate::RWRegister<u32>,
_reserved3: [u8; 0x0400],
#[doc = "Rx Individual Mask Registers"]
pub RXIMR: [crate::RWRegister<u32>; 64usize],
_reserved4: [u8; 0x0270],
#[doc = "Enhanced CAN Bit Timing Prescalers"]
pub EPRS: crate::RWRegister<u32>,
#[doc = "Enhanced Nominal CAN Bit Timing"]
pub ENCBT: crate::RWRegister<u32>,
#[doc = "Enhanced Data Phase CAN bit Timing"]
pub EDCBT: crate::RWRegister<u32>,
#[doc = "Enhanced Transceiver Delay Compensation"]
pub ETDC: crate::RWRegister<u32>,
#[doc = "CAN FD Control Register"]
pub FDCTRL: crate::RWRegister<u32>,
#[doc = "CAN FD Bit Timing Register"]
pub FDCBT: crate::RWRegister<u32>,
#[doc = "CAN FD CRC Register"]
pub FDCRC: crate::RORegister<u32>,
#[doc = "Enhanced Rx FIFO Control Register"]
pub ERFCR: crate::RWRegister<u32>,
#[doc = "Enhanced Rx FIFO Interrupt Enable register"]
pub ERFIER: crate::RWRegister<u32>,
#[doc = "Enhanced Rx FIFO Status Register"]
pub ERFSR: crate::RWRegister<u32>,
_reserved5: [u8; 0x18],
#[doc = "High Resolution Time Stamp"]
pub HR_TIME_STAMP: [crate::RORegister<u32>; 64usize],
_reserved6: [u8; 0x22d0],
#[doc = "Enhanced Rx FIFO Filter Element"]
pub ERFFEL: [crate::RWRegister<u32>; 128usize],
}
#[doc = "Module Configuration Register"]
pub mod MCR {
#[doc = "Number Of The Last Message Buffer"]
pub mod MAXMB {
pub const offset: u32 = 0;
pub const mask: u32 = 0x7f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Acceptance Mode"]
pub mod IDAM {
pub const offset: u32 = 8;
pub const mask: u32 = 0x03 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
pub const IDAM_0: u32 = 0;
#[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
pub const IDAM_1: u32 = 0x01;
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
pub const IDAM_2: u32 = 0x02;
#[doc = "Format D: All frames rejected."]
pub const IDAM_3: u32 = 0x03;
}
}
#[doc = "CAN FD operation enable"]
pub mod FDEN {
pub const offset: u32 = 11;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
pub const FDEN_0: u32 = 0;
#[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
pub const FDEN_1: u32 = 0x01;
}
}
#[doc = "Abort Enable"]
pub mod AEN {
pub const offset: u32 = 12;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Abort disabled."]
pub const AEN_0: u32 = 0;
#[doc = "Abort enabled."]
pub const AEN_1: u32 = 0x01;
}
}
#[doc = "Local Priority Enable"]
pub mod LPRIOEN {
pub const offset: u32 = 13;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Local Priority disabled."]
pub const LPRIOEN_0: u32 = 0;
#[doc = "Local Priority enabled."]
pub const LPRIOEN_1: u32 = 0x01;
}
}
#[doc = "DMA Enable"]
pub mod DMA {
pub const offset: u32 = 15;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "DMA feature for Legacy RX FIFO or Enhanced Rx FIFO are disabled."]
pub const DMA_0: u32 = 0;
#[doc = "DMA feature for Legacy RX FIFO or Enhanced Rx FIFO are enabled."]
pub const DMA_1: u32 = 0x01;
}
}
#[doc = "Individual Rx Masking And Queue Enable"]
pub mod IRMQ {
pub const offset: u32 = 16;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
pub const IRMQ_0: u32 = 0;
#[doc = "Individual Rx masking and queue feature are enabled."]
pub const IRMQ_1: u32 = 0x01;
}
}
#[doc = "Self Reception Disable"]
pub mod SRXDIS {
pub const offset: u32 = 17;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Self reception enabled."]
pub const SRXDIS_0: u32 = 0;
#[doc = "Self reception disabled."]
pub const SRXDIS_1: u32 = 0x01;
}
}
#[doc = "Doze Mode Enable"]
pub mod DOZE {
pub const offset: u32 = 18;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN is not enabled to enter low-power mode when Doze mode is requested."]
pub const DOZE_0: u32 = 0;
#[doc = "FlexCAN is enabled to enter low-power mode when Doze mode is requested."]
pub const DOZE_1: u32 = 0x01;
}
}
#[doc = "Wake Up Source"]
pub mod WAKSRC {
pub const offset: u32 = 19;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN uses the unfiltered Rx input to detect recessive to dominant edges on the CAN bus."]
pub const WAKSRC_0: u32 = 0;
#[doc = "FlexCAN uses the filtered Rx input to detect recessive to dominant edges on the CAN bus."]
pub const WAKSRC_1: u32 = 0x01;
}
}
#[doc = "Low-Power Mode Acknowledge"]
pub mod LPMACK {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN is not in a low-power mode."]
pub const LPMACK_0: u32 = 0;
#[doc = "FlexCAN is in a low-power mode."]
pub const LPMACK_1: u32 = 0x01;
}
}
#[doc = "Warning Interrupt Enable"]
pub mod WRNEN {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
pub const WRNEN_0: u32 = 0;
#[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
pub const WRNEN_1: u32 = 0x01;
}
}
#[doc = "Self Wake Up"]
pub mod SLFWAK {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN Self Wake Up feature is disabled."]
pub const SLFWAK_0: u32 = 0;
#[doc = "FlexCAN Self Wake Up feature is enabled."]
pub const SLFWAK_1: u32 = 0x01;
}
}
#[doc = "Supervisor Mode"]
pub mod SUPV {
pub const offset: u32 = 23;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN is in User mode. Affected registers allow both Supervisor and Unrestricted accesses."]
pub const SUPV_0: u32 = 0;
#[doc = "FlexCAN is in Supervisor mode. Affected registers allow only Supervisor access. Unrestricted access behaves as though the access was done to an unimplemented register location."]
pub const SUPV_1: u32 = 0x01;
}
}
#[doc = "Freeze Mode Acknowledge"]
pub mod FRZACK {
pub const offset: u32 = 24;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN not in Freeze mode, prescaler running."]
pub const FRZACK_0: u32 = 0;
#[doc = "FlexCAN in Freeze mode, prescaler stopped."]
pub const FRZACK_1: u32 = 0x01;
}
}
#[doc = "Soft Reset"]
pub mod SOFTRST {
pub const offset: u32 = 25;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No reset request."]
pub const SOFTRST_0: u32 = 0;
#[doc = "Resets the registers affected by soft reset."]
pub const SOFTRST_1: u32 = 0x01;
}
}
#[doc = "Wake Up Interrupt Mask"]
pub mod WAKMSK {
pub const offset: u32 = 26;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Wake Up Interrupt is disabled."]
pub const WAKMSK_0: u32 = 0;
#[doc = "Wake Up Interrupt is enabled."]
pub const WAKMSK_1: u32 = 0x01;
}
}
#[doc = "FlexCAN Not Ready"]
pub mod NOTRDY {
pub const offset: u32 = 27;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."]
pub const NOTRDY_0: u32 = 0;
#[doc = "FlexCAN module is either in Disable mode, Doze mode , Stop mode or Freeze mode."]
pub const NOTRDY_1: u32 = 0x01;
}
}
#[doc = "Halt FlexCAN"]
pub mod HALT {
pub const offset: u32 = 28;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No Freeze mode request."]
pub const HALT_0: u32 = 0;
#[doc = "Enters Freeze mode if the FRZ bit is asserted."]
pub const HALT_1: u32 = 0x01;
}
}
#[doc = "Legacy Rx FIFO Enable"]
pub mod RFEN {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Legacy Rx FIFO not enabled."]
pub const RFEN_0: u32 = 0;
#[doc = "Legacy Rx FIFO enabled."]
pub const RFEN_1: u32 = 0x01;
}
}
#[doc = "Freeze Enable"]
pub mod FRZ {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Not enabled to enter Freeze mode."]
pub const FRZ_0: u32 = 0;
#[doc = "Enabled to enter Freeze mode."]
pub const FRZ_1: u32 = 0x01;
}
}
#[doc = "Module Disable"]
pub mod MDIS {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Enable the FlexCAN module."]
pub const MDIS_0: u32 = 0;
#[doc = "Disable the FlexCAN module."]
pub const MDIS_1: u32 = 0x01;
}
}
}
#[doc = "Control 1 register"]
pub mod CTRL1 {
#[doc = "Propagation Segment"]
pub mod PROPSEG {
pub const offset: u32 = 0;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Listen-Only Mode"]
pub mod LOM {
pub const offset: u32 = 3;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Listen-Only mode is deactivated."]
pub const LOM_0: u32 = 0;
#[doc = "FlexCAN module operates in Listen-Only mode."]
pub const LOM_1: u32 = 0x01;
}
}
#[doc = "Lowest Buffer Transmitted First"]
pub mod LBUF {
pub const offset: u32 = 4;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Buffer with highest priority is transmitted first."]
pub const LBUF_0: u32 = 0;
#[doc = "Lowest number buffer is transmitted first."]
pub const LBUF_1: u32 = 0x01;
}
}
#[doc = "Timer Sync"]
pub mod TSYN {
pub const offset: u32 = 5;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Timer Sync feature disabled"]
pub const TSYN_0: u32 = 0;
#[doc = "Timer Sync feature enabled"]
pub const TSYN_1: u32 = 0x01;
}
}
#[doc = "Bus Off Recovery"]
pub mod BOFFREC {
pub const offset: u32 = 6;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Automatic recovering from Bus Off state enabled."]
pub const BOFFREC_0: u32 = 0;
#[doc = "Automatic recovering from Bus Off state disabled."]
pub const BOFFREC_1: u32 = 0x01;
}
}
#[doc = "CAN Bit Sampling"]
pub mod SMP {
pub const offset: u32 = 7;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Just one sample is used to determine the bit value."]
pub const SMP_0: u32 = 0;
#[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
pub const SMP_1: u32 = 0x01;
}
}
#[doc = "Rx Warning Interrupt Mask"]
pub mod RWRNMSK {
pub const offset: u32 = 10;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Rx Warning Interrupt disabled."]
pub const RWRNMSK_0: u32 = 0;
#[doc = "Rx Warning Interrupt enabled."]
pub const RWRNMSK_1: u32 = 0x01;
}
}
#[doc = "Tx Warning Interrupt Mask"]
pub mod TWRNMSK {
pub const offset: u32 = 11;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Tx Warning Interrupt disabled."]
pub const TWRNMSK_0: u32 = 0;
#[doc = "Tx Warning Interrupt enabled."]
pub const TWRNMSK_1: u32 = 0x01;
}
}
#[doc = "Loop Back Mode"]
pub mod LPB {
pub const offset: u32 = 12;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Loop Back disabled."]
pub const LPB_0: u32 = 0;
#[doc = "Loop Back enabled."]
pub const LPB_1: u32 = 0x01;
}
}
#[doc = "CAN Engine Clock Source"]
pub mod CLKSRC {
pub const offset: u32 = 13;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
pub const CLKSRC_0: u32 = 0;
#[doc = "The CAN engine clock source is the peripheral clock."]
pub const CLKSRC_1: u32 = 0x01;
}
}
#[doc = "Error Interrupt Mask"]
pub mod ERRMSK {
pub const offset: u32 = 14;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Error interrupt disabled."]
pub const ERRMSK_0: u32 = 0;
#[doc = "Error interrupt enabled."]
pub const ERRMSK_1: u32 = 0x01;
}
}
#[doc = "Bus Off Interrupt Mask"]
pub mod BOFFMSK {
pub const offset: u32 = 15;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Bus Off interrupt disabled."]
pub const BOFFMSK_0: u32 = 0;
#[doc = "Bus Off interrupt enabled."]
pub const BOFFMSK_1: u32 = 0x01;
}
}
#[doc = "Phase Segment 2"]
pub mod PSEG2 {
pub const offset: u32 = 16;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Phase Segment 1"]
pub mod PSEG1 {
pub const offset: u32 = 19;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Resync Jump Width"]
pub mod RJW {
pub const offset: u32 = 22;
pub const mask: u32 = 0x03 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Prescaler Division Factor"]
pub mod PRESDIV {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Free Running Timer"]
pub mod TIMER {
#[doc = "Timer Value"]
pub mod TIMER {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Rx Mailboxes Global Mask Register"]
pub mod RXMGMASK {
#[doc = "Rx Mailboxes Global Mask Bits"]
pub mod MG {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Rx 14 Mask register"]
pub mod RX14MASK {
#[doc = "Rx Buffer 14 Mask Bits"]
pub mod RX14M {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Rx 15 Mask register"]
pub mod RX15MASK {
#[doc = "Rx Buffer 15 Mask Bits"]
pub mod RX15M {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Error Counter"]
pub mod ECR {
#[doc = "Transmit Error Counter"]
pub mod TXERRCNT {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Receive Error Counter"]
pub mod RXERRCNT {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Transmit Error Counter for fast bits"]
pub mod TXERRCNT_FAST {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Receive Error Counter for fast bits"]
pub mod RXERRCNT_FAST {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Error and Status 1 register"]
pub mod ESR1 {
#[doc = "Wake-Up Interrupt"]
pub mod WAKINT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const WAKINT_0: u32 = 0;
#[doc = "Indicates a recessive to dominant transition was received on the CAN bus."]
pub const WAKINT_1: u32 = 0x01;
}
}
#[doc = "Error Interrupt"]
pub mod ERRINT {
pub const offset: u32 = 1;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const ERRINT_0: u32 = 0;
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
pub const ERRINT_1: u32 = 0x01;
}
}
#[doc = "Bus Off Interrupt"]
pub mod BOFFINT {
pub const offset: u32 = 2;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const BOFFINT_0: u32 = 0;
#[doc = "FlexCAN module entered Bus Off state."]
pub const BOFFINT_1: u32 = 0x01;
}
}
#[doc = "FlexCAN In Reception"]
pub mod RX {
pub const offset: u32 = 3;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN is not receiving a message."]
pub const RX_0: u32 = 0;
#[doc = "FlexCAN is receiving a message."]
pub const RX_1: u32 = 0x01;
}
}
#[doc = "Fault Confinement State"]
pub mod FLTCONF {
pub const offset: u32 = 4;
pub const mask: u32 = 0x03 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Error Active"]
pub const FLTCONF_0: u32 = 0;
#[doc = "Error Passive"]
pub const FLTCONF_1: u32 = 0x01;
#[doc = "Bus Off"]
pub const FLTCONF_2: u32 = 0x02;
}
}
#[doc = "FlexCAN In Transmission"]
pub mod TX {
pub const offset: u32 = 6;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN is not transmitting a message."]
pub const TX_0: u32 = 0;
#[doc = "FlexCAN is transmitting a message."]
pub const TX_1: u32 = 0x01;
}
}
#[doc = "IDLE"]
pub mod IDLE {
pub const offset: u32 = 7;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const IDLE_0: u32 = 0;
#[doc = "CAN bus is now IDLE."]
pub const IDLE_1: u32 = 0x01;
}
}
#[doc = "Rx Error Warning"]
pub mod RXWRN {
pub const offset: u32 = 8;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const RXWRN_0: u32 = 0;
#[doc = "RXERRCNT is greater than or equal to 96."]
pub const RXWRN_1: u32 = 0x01;
}
}
#[doc = "TX Error Warning"]
pub mod TXWRN {
pub const offset: u32 = 9;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const TXWRN_0: u32 = 0;
#[doc = "TXERRCNT is greater than or equal to 96."]
pub const TXWRN_1: u32 = 0x01;
}
}
#[doc = "Stuffing Error"]
pub mod STFERR {
pub const offset: u32 = 10;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const STFERR_0: u32 = 0;
#[doc = "A Stuffing Error occurred since last read of this register."]
pub const STFERR_1: u32 = 0x01;
}
}
#[doc = "Form Error"]
pub mod FRMERR {
pub const offset: u32 = 11;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const FRMERR_0: u32 = 0;
#[doc = "A Form Error occurred since last read of this register."]
pub const FRMERR_1: u32 = 0x01;
}
}
#[doc = "Cyclic Redundancy Check Error"]
pub mod CRCERR {
pub const offset: u32 = 12;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const CRCERR_0: u32 = 0;
#[doc = "A CRC error occurred since last read of this register."]
pub const CRCERR_1: u32 = 0x01;
}
}
#[doc = "Acknowledge Error"]
pub mod ACKERR {
pub const offset: u32 = 13;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const ACKERR_0: u32 = 0;
#[doc = "An ACK error occurred since last read of this register."]
pub const ACKERR_1: u32 = 0x01;
}
}
#[doc = "Bit0 Error"]
pub mod BIT0ERR {
pub const offset: u32 = 14;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const BIT0ERR_0: u32 = 0;
#[doc = "At least one bit sent as dominant is received as recessive."]
pub const BIT0ERR_1: u32 = 0x01;
}
}
#[doc = "Bit1 Error"]
pub mod BIT1ERR {
pub const offset: u32 = 15;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const BIT1ERR_0: u32 = 0;
#[doc = "At least one bit sent as recessive is received as dominant."]
pub const BIT1ERR_1: u32 = 0x01;
}
}
#[doc = "Rx Warning Interrupt Flag"]
pub mod RWRNINT {
pub const offset: u32 = 16;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const RWRNINT_0: u32 = 0;
#[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
pub const RWRNINT_1: u32 = 0x01;
}
}
#[doc = "Tx Warning Interrupt Flag"]
pub mod TWRNINT {
pub const offset: u32 = 17;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const TWRNINT_0: u32 = 0;
#[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
pub const TWRNINT_1: u32 = 0x01;
}
}
#[doc = "CAN Synchronization Status"]
pub mod SYNCH {
pub const offset: u32 = 18;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN is not synchronized to the CAN bus."]
pub const SYNCH_0: u32 = 0;
#[doc = "FlexCAN is synchronized to the CAN bus."]
pub const SYNCH_1: u32 = 0x01;
}
}
#[doc = "Bus Off Done Interrupt"]
pub mod BOFFDONEINT {
pub const offset: u32 = 19;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const BOFFDONEINT_0: u32 = 0;
#[doc = "FlexCAN module has completed Bus Off process."]
pub const BOFFDONEINT_1: u32 = 0x01;
}
}
#[doc = "Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"]
pub mod ERRINT_FAST {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const ERRINT_FAST_0: u32 = 0;
#[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
pub const ERRINT_FAST_1: u32 = 0x01;
}
}
#[doc = "Error Overrun bit"]
pub mod ERROVR {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Overrun has not occurred."]
pub const ERROVR_0: u32 = 0;
#[doc = "Overrun has occurred."]
pub const ERROVR_1: u32 = 0x01;
}
}
#[doc = "Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set"]
pub mod STFERR_FAST {
pub const offset: u32 = 26;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const STFERR_FAST_0: u32 = 0;
#[doc = "A Stuffing Error occurred since last read of this register."]
pub const STFERR_FAST_1: u32 = 0x01;
}
}
#[doc = "Form Error in the Data Phase of CAN FD frames with the BRS bit set"]
pub mod FRMERR_FAST {
pub const offset: u32 = 27;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const FRMERR_FAST_0: u32 = 0;
#[doc = "A Form Error occurred since last read of this register."]
pub const FRMERR_FAST_1: u32 = 0x01;
}
}
#[doc = "Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set"]
pub mod CRCERR_FAST {
pub const offset: u32 = 28;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const CRCERR_FAST_0: u32 = 0;
#[doc = "A CRC error occurred since last read of this register."]
pub const CRCERR_FAST_1: u32 = 0x01;
}
}
#[doc = "Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set"]
pub mod BIT0ERR_FAST {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const BIT0ERR_FAST_0: u32 = 0;
#[doc = "At least one bit sent as dominant is received as recessive."]
pub const BIT0ERR_FAST_1: u32 = 0x01;
}
}
#[doc = "Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set"]
pub mod BIT1ERR_FAST {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence."]
pub const BIT1ERR_FAST_0: u32 = 0;
#[doc = "At least one bit sent as recessive is received as dominant."]
pub const BIT1ERR_FAST_1: u32 = 0x01;
}
}
}
#[doc = "Interrupt Masks 2 register"]
pub mod IMASK2 {
#[doc = "Buffer MB i Mask"]
pub mod BUF63TO32M {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Interrupt Masks 1 register"]
pub mod IMASK1 {
#[doc = "Buffer MB i Mask"]
pub mod BUF31TO0M {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Interrupt Flags 2 register"]
pub mod IFLAG2 {
#[doc = "Buffer MB i Interrupt"]
pub mod BUF63TO32I {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Interrupt Flags 1 register"]
pub mod IFLAG1 {
#[doc = "Buffer MB0 Interrupt Or Clear Legacy FIFO bit"]
pub mod BUF0I {
pub const offset: u32 = 0;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when CAN_MCR\\[RFEN\\]=0."]
pub const BUF0I_0: u32 = 0;
#[doc = "The corresponding buffer has successfully completed transmission or reception when CAN_MCR\\[RFEN\\]=0."]
pub const BUF0I_1: u32 = 0x01;
}
}
#[doc = "Buffer MB i Interrupt Or \"reserved\""]
pub mod BUF4TO1I {
pub const offset: u32 = 1;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Buffer MB5 Interrupt Or \"Frames available in Legacy Rx FIFO\""]
pub mod BUF5I {
pub const offset: u32 = 5;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No occurrence of MB5 completing transmission/reception when CAN_MCR\\[RFEN\\]=0, or of frame(s) available in the Legacy FIFO, when CAN_MCR\\[RFEN\\]=1"]
pub const BUF5I_0: u32 = 0;
#[doc = "MB5 completed transmission/reception when CAN_MCR\\[RFEN\\]=0, or frame(s) available in the Legacy Rx FIFO when CAN_MCR\\[RFEN\\]=1. It generates a DMA request in case of CAN_MCR\\[RFEN\\] and CAN_MCR\\[DMA\\] are enabled."]
pub const BUF5I_1: u32 = 0x01;
}
}
#[doc = "Buffer MB6 Interrupt Or \"Legacy Rx FIFO Warning\""]
pub mod BUF6I {
pub const offset: u32 = 6;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No occurrence of MB6 completing transmission/reception when CAN_MCR\\[RFEN\\]=0, or of Legacy Rx FIFO almost full when CAN_MCR\\[RFEN\\]=1"]
pub const BUF6I_0: u32 = 0;
#[doc = "MB6 completed transmission/reception when CAN_MCR\\[RFEN\\]=0, or Legacy Rx FIFO almost full when CAN_MCR\\[RFEN\\]=1"]
pub const BUF6I_1: u32 = 0x01;
}
}
#[doc = "Buffer MB7 Interrupt Or \"Legacy Rx FIFO Overflow\""]
pub mod BUF7I {
pub const offset: u32 = 7;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No occurrence of MB7 completing transmission/reception when CAN_MCR\\[RFEN\\]=0, or of Legacy Rx FIFO overflow when CAN_MCR\\[RFEN\\]=1"]
pub const BUF7I_0: u32 = 0;
#[doc = "MB7 completed transmission/reception when CAN_MCR\\[RFEN\\]=0, or Legacy Rx FIFO overflow when CAN_MCR\\[RFEN\\]=1"]
pub const BUF7I_1: u32 = 0x01;
}
}
#[doc = "Buffer MBi Interrupt"]
pub mod BUF31TO8I {
pub const offset: u32 = 8;
pub const mask: u32 = 0x00ff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Control 2 register"]
pub mod CTRL2 {
#[doc = "Time Stamp Capture Point"]
pub mod TSTAMPCAP {
pub const offset: u32 = 6;
pub const mask: u32 = 0x03 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "The high resolution time stamp capture is disabled"]
pub const TSTAMPCAP_0: u32 = 0;
#[doc = "The high resolution time stamp is captured in the end of the CAN frame"]
pub const TSTAMPCAP_1: u32 = 0x01;
#[doc = "The high resolution time stamp is captured in the start of the CAN frame"]
pub const TSTAMPCAP_2: u32 = 0x02;
#[doc = "The high resolution time stamp is captured in the start of frame for classical CAN frames and in res bit for CAN FD frames"]
pub const TSTAMPCAP_3: u32 = 0x03;
}
}
#[doc = "Message Buffer Time Stamp Base"]
pub mod MBTSBASE {
pub const offset: u32 = 8;
pub const mask: u32 = 0x03 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Message Buffer Time Stamp base is CAN_TIMER"]
pub const MBTSBASE_0: u32 = 0;
#[doc = "Message Buffer Time Stamp base is lower 16-bits of high resolution timer"]
pub const MBTSBASE_1: u32 = 0x01;
#[doc = "Message Buffer Time Stamp base is upper 16-bits of high resolution timerT"]
pub const MBTSBASE_2: u32 = 0x02;
}
}
#[doc = "Edge Filter Disable"]
pub mod EDFLTDIS {
pub const offset: u32 = 11;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Edge Filter is enabled"]
pub const EDFLTDIS_0: u32 = 0;
#[doc = "Edge Filter is disabled"]
pub const EDFLTDIS_1: u32 = 0x01;
}
}
#[doc = "ISO CAN FD Enable"]
pub mod ISOCANFDEN {
pub const offset: u32 = 12;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
pub const ISOCANFDEN_0: u32 = 0;
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
pub const ISOCANFDEN_1: u32 = 0x01;
}
}
#[doc = "Bit Timing Expansion enable"]
pub mod BTE {
pub const offset: u32 = 13;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "CAN Bit timing expansion is disabled."]
pub const BTE_0: u32 = 0;
#[doc = "CAN bit timing expansion is enabled."]
pub const BTE_1: u32 = 0x01;
}
}
#[doc = "Protocol Exception Enable"]
pub mod PREXCEN {
pub const offset: u32 = 14;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Protocol Exception is disabled."]
pub const PREXCEN_0: u32 = 0;
#[doc = "Protocol Exception is enabled."]
pub const PREXCEN_1: u32 = 0x01;
}
}
#[doc = "Timer Source"]
pub mod TIMER_SRC {
pub const offset: u32 = 15;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
pub const TIMER_SRC_0: u32 = 0;
#[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
pub const TIMER_SRC_1: u32 = 0x01;
}
}
#[doc = "Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"]
pub mod EACEN {
pub const offset: u32 = 16;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
pub const EACEN_0: u32 = 0;
#[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
pub const EACEN_1: u32 = 0x01;
}
}
#[doc = "Remote Request Storing"]
pub mod RRS {
pub const offset: u32 = 17;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Remote Response Frame is generated."]
pub const RRS_0: u32 = 0;
#[doc = "Remote Request Frame is stored."]
pub const RRS_1: u32 = 0x01;
}
}
#[doc = "Mailboxes Reception Priority"]
pub mod MRP {
pub const offset: u32 = 18;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Matching starts from Legacy Rx FIFO or Enhanced Rx FIFO and continues on Mailboxes."]
pub const MRP_0: u32 = 0;
#[doc = "Matching starts from Mailboxes and continues on Legacy Rx FIFO or Enhanced Rx FIFO ."]
pub const MRP_1: u32 = 0x01;
}
}
#[doc = "Tx Arbitration Start Delay"]
pub mod TASD {
pub const offset: u32 = 19;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Number Of Legacy Rx FIFO Filters"]
pub mod RFFN {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bus Off Done Interrupt Mask"]
pub mod BOFFDONEMSK {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Bus Off Done interrupt disabled."]
pub const BOFFDONEMSK_0: u32 = 0;
#[doc = "Bus Off Done interrupt enabled."]
pub const BOFFDONEMSK_1: u32 = 0x01;
}
}
#[doc = "Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"]
pub mod ERRMSK_FAST {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "ERRINT_FAST Error interrupt disabled."]
pub const ERRMSK_FAST_0: u32 = 0;
#[doc = "ERRINT_FAST Error interrupt enabled."]
pub const ERRMSK_FAST_1: u32 = 0x01;
}
}
}
#[doc = "Error and Status 2 register"]
pub mod ESR2 {
#[doc = "Inactive Mailbox"]
pub mod IMB {
pub const offset: u32 = 13;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "If CAN_ESR2\\[VPS\\] is asserted, the CAN_ESR2\\[LPTM\\] is not an inactive Mailbox."]
pub const IMB_0: u32 = 0;
#[doc = "If CAN_ESR2\\[VPS\\] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
pub const IMB_1: u32 = 0x01;
}
}
#[doc = "Valid Priority Status"]
pub mod VPS {
pub const offset: u32 = 14;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Contents of IMB and LPTM are invalid."]
pub const VPS_0: u32 = 0;
#[doc = "Contents of IMB and LPTM are valid."]
pub const VPS_1: u32 = 0x01;
}
}
#[doc = "Lowest Priority Tx Mailbox"]
pub mod LPTM {
pub const offset: u32 = 16;
pub const mask: u32 = 0x7f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "CRC Register"]
pub mod CRCR {
#[doc = "Transmitted CRC value"]
pub mod TXCRC {
pub const offset: u32 = 0;
pub const mask: u32 = 0x7fff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "CRC Mailbox"]
pub mod MBCRC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x7f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Legacy Rx FIFO Global Mask register"]
pub mod RXFGMASK {
#[doc = "Legacy Rx FIFO Global Mask Bits"]
pub mod FGM {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Legacy Rx FIFO Information Register"]
pub mod RXFIR {
#[doc = "Identifier Acceptance Filter Hit Indicator"]
pub mod IDHIT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x01ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "CAN Bit Timing Register"]
pub mod CBT {
#[doc = "Extended Phase Segment 2"]
pub mod EPSEG2 {
pub const offset: u32 = 0;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Phase Segment 1"]
pub mod EPSEG1 {
pub const offset: u32 = 5;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Propagation Segment"]
pub mod EPROPSEG {
pub const offset: u32 = 10;
pub const mask: u32 = 0x3f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Resync Jump Width"]
pub mod ERJW {
pub const offset: u32 = 16;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Prescaler Division Factor"]
pub mod EPRESDIV {
pub const offset: u32 = 21;
pub const mask: u32 = 0x03ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Timing Format Enable"]
pub mod BTF {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Extended bit time definitions disabled."]
pub const BTF_0: u32 = 0;
#[doc = "Extended bit time definitions enabled."]
pub const BTF_1: u32 = 0x01;
}
}
}
#[doc = "Message Buffer 0 CS Register"]
pub mod CS0 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 ID Register"]
pub mod ID0 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 WORD_16B Register"]
pub mod MB0_16B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 WORD_16B Register"]
pub mod MB0_16B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 CS Register"]
pub mod CS1 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 ID Register"]
pub mod ID1 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 WORD_32B Register"]
pub mod MB0_32B_WORD4 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_19 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_18 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_17 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_16 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 WORD_32B Register"]
pub mod MB0_32B_WORD5 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_23 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_22 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_21 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_20 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 2 CS Register"]
pub mod CS2 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 2 ID Register"]
pub mod ID2 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 WORD_64B Register"]
pub mod MB0_64B_WORD8 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_35 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_34 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_33 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_32 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 WORD_64B Register"]
pub mod MB0_64B_WORD9 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_39 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_38 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_37 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_36 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 3 CS Register"]
pub mod CS3 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 3 ID Register"]
pub mod ID3 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 WORD_64B Register"]
pub mod MB0_64B_WORD12 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_51 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_50 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_49 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_48 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 0 WORD_64B Register"]
pub mod MB0_64B_WORD13 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_55 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_54 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_53 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_52 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 4 CS Register"]
pub mod CS4 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 4 ID Register"]
pub mod ID4 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_32B Register"]
pub mod MB1_32B_WORD6 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_27 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_26 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_25 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_24 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_32B Register"]
pub mod MB1_32B_WORD7 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_31 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_30 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_29 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_28 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 5 CS Register"]
pub mod CS5 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 5 ID Register"]
pub mod ID5 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_64B Register"]
pub mod MB1_64B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_64B Register"]
pub mod MB1_64B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 6 CS Register"]
pub mod CS6 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 6 ID Register"]
pub mod ID6 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_64B Register"]
pub mod MB1_64B_WORD6 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_27 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_26 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_25 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_24 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_64B Register"]
pub mod MB1_64B_WORD7 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_31 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_30 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_29 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_28 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 7 CS Register"]
pub mod CS7 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 7 ID Register"]
pub mod ID7 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_64B Register"]
pub mod MB1_64B_WORD10 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_43 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_42 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_41 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_40 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_64B Register"]
pub mod MB1_64B_WORD11 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_47 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_46 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_45 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_44 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 8 CS Register"]
pub mod CS8 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 8 ID Register"]
pub mod ID8 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_64B Register"]
pub mod MB1_64B_WORD14 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_59 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_58 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_57 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_56 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 1 WORD_64B Register"]
pub mod MB1_64B_WORD15 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_63 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_62 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_61 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_60 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 9 CS Register"]
pub mod CS9 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 9 ID Register"]
pub mod ID9 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 2 WORD_64B Register"]
pub mod MB2_64B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 2 WORD_64B Register"]
pub mod MB2_64B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 CS Register"]
pub mod CS10 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 ID Register"]
pub mod ID10 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_8B Register"]
pub mod MB10_8B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_8B Register"]
pub mod MB10_8B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 CS Register"]
pub mod CS11 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 ID Register"]
pub mod ID11 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_8B Register"]
pub mod MB11_8B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_8B Register"]
pub mod MB11_8B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 CS Register"]
pub mod CS12 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 ID Register"]
pub mod ID12 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_8B Register"]
pub mod MB12_8B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_8B Register"]
pub mod MB12_8B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 CS Register"]
pub mod CS13 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 ID Register"]
pub mod ID13 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_8B Register"]
pub mod MB13_8B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_8B Register"]
pub mod MB13_8B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 CS Register"]
pub mod CS14 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 ID Register"]
pub mod ID14 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 WORD_8B Register"]
pub mod MB14_8B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 WORD_8B Register"]
pub mod MB14_8B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 CS Register"]
pub mod CS15 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 ID Register"]
pub mod ID15 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_16B Register"]
pub mod MB10_16B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_16B Register"]
pub mod MB10_16B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 16 CS Register"]
pub mod CS16 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 16 ID Register"]
pub mod ID16 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 CS Register"]
pub mod MB11_16B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 ID Register"]
pub mod MB11_16B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 17 CS Register"]
pub mod CS17 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 17 ID Register"]
pub mod ID17 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_16B Register"]
pub mod MB11_16B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_16B Register"]
pub mod MB11_16B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 18 CS Register"]
pub mod CS18 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 18 ID Register"]
pub mod ID18 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_16B Register"]
pub mod MB12_16B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_16B Register"]
pub mod MB12_16B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 19 CS Register"]
pub mod CS19 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 19 ID Register"]
pub mod ID19 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 CS Register"]
pub mod MB13_16B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 ID Register"]
pub mod MB13_16B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 20 CS Register"]
pub mod CS20 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 20 ID Register"]
pub mod ID20 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_16B Register"]
pub mod MB13_16B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_16B Register"]
pub mod MB13_16B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 21 CS Register"]
pub mod CS21 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 21 ID Register"]
pub mod ID21 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 WORD_16B Register"]
pub mod MB14_16B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 WORD_16B Register"]
pub mod MB14_16B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 22 CS Register"]
pub mod CS22 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 22 ID Register"]
pub mod ID22 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 CS Register"]
pub mod MB15_16B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 ID Register"]
pub mod MB15_16B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 23 CS Register"]
pub mod CS23 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 23 ID Register"]
pub mod ID23 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 WORD_16B Register"]
pub mod MB15_16B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 WORD_16B Register"]
pub mod MB15_16B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 24 CS Register"]
pub mod CS24 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 24 ID Register"]
pub mod ID24 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 16 WORD_16B Register"]
pub mod MB16_16B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 16 WORD_16B Register"]
pub mod MB16_16B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 25 CS Register"]
pub mod CS25 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 25 ID Register"]
pub mod ID25 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_32B Register"]
pub mod MB10_32B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_32B Register"]
pub mod MB10_32B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 26 CS Register"]
pub mod CS26 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 26 ID Register"]
pub mod ID26 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_32B Register"]
pub mod MB10_32B_WORD4 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_19 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_18 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_17 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_16 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_32B Register"]
pub mod MB10_32B_WORD5 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_23 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_22 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_21 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_20 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 27 CS Register"]
pub mod CS27 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 27 ID Register"]
pub mod ID27 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 CS Register"]
pub mod MB11_32B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 ID Register"]
pub mod MB11_32B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 28 CS Register"]
pub mod CS28 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 28 ID Register"]
pub mod ID28 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_32B Register"]
pub mod MB11_32B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_32B Register"]
pub mod MB11_32B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 29 CS Register"]
pub mod CS29 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 29 ID Register"]
pub mod ID29 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_32B Register"]
pub mod MB11_32B_WORD6 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_27 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_26 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_25 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_24 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_32B Register"]
pub mod MB11_32B_WORD7 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_31 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_30 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_29 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_28 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 30 CS Register"]
pub mod CS30 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 30 ID Register"]
pub mod ID30 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_32B Register"]
pub mod MB12_32B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_32B Register"]
pub mod MB12_32B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 31 CS Register"]
pub mod CS31 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 31 ID Register"]
pub mod ID31 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_32B Register"]
pub mod MB12_32B_WORD4 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_19 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_18 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_17 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_16 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_32B Register"]
pub mod MB12_32B_WORD5 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_23 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_22 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_21 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_20 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 32 CS Register"]
pub mod CS32 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 32 ID Register"]
pub mod ID32 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 CS Register"]
pub mod MB13_32B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 ID Register"]
pub mod MB13_32B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 33 CS Register"]
pub mod CS33 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 33 ID Register"]
pub mod ID33 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_32B Register"]
pub mod MB13_32B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_32B Register"]
pub mod MB13_32B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 34 CS Register"]
pub mod CS34 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 34 ID Register"]
pub mod ID34 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_32B Register"]
pub mod MB13_32B_WORD6 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_27 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_26 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_25 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_24 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_32B Register"]
pub mod MB13_32B_WORD7 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_31 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_30 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_29 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_28 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 35 CS Register"]
pub mod CS35 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 35 ID Register"]
pub mod ID35 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 WORD_32B Register"]
pub mod MB14_32B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 WORD_32B Register"]
pub mod MB14_32B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 36 CS Register"]
pub mod CS36 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 36 ID Register"]
pub mod ID36 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 WORD_32B Register"]
pub mod MB14_32B_WORD4 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_19 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_18 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_17 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_16 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 14 WORD_32B Register"]
pub mod MB14_32B_WORD5 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_23 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_22 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_21 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_20 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 37 CS Register"]
pub mod CS37 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 37 ID Register"]
pub mod ID37 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 CS Register"]
pub mod MB15_32B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 ID Register"]
pub mod MB15_32B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 38 CS Register"]
pub mod CS38 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 38 ID Register"]
pub mod ID38 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 WORD_32B Register"]
pub mod MB15_32B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 WORD_32B Register"]
pub mod MB15_32B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 39 CS Register"]
pub mod CS39 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 39 ID Register"]
pub mod ID39 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 WORD_32B Register"]
pub mod MB15_32B_WORD6 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_27 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_26 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_25 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_24 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 15 WORD_32B Register"]
pub mod MB15_32B_WORD7 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_31 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_30 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_29 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_28 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 40 CS Register"]
pub mod CS40 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 40 ID Register"]
pub mod ID40 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 16 WORD_32B Register"]
pub mod MB16_32B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 16 WORD_32B Register"]
pub mod MB16_32B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 41 CS Register"]
pub mod CS41 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 41 ID Register"]
pub mod ID41 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 16 WORD_32B Register"]
pub mod MB16_32B_WORD4 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_19 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_18 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_17 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_16 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 16 WORD_32B Register"]
pub mod MB16_32B_WORD5 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_23 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_22 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_21 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_20 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 42 CS Register"]
pub mod CS42 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 42 ID Register"]
pub mod ID42 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 17 CS Register"]
pub mod MB17_32B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 17 ID Register"]
pub mod MB17_32B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 43 CS Register"]
pub mod CS43 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 43 ID Register"]
pub mod ID43 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 17 WORD_32B Register"]
pub mod MB17_32B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 17 WORD_32B Register"]
pub mod MB17_32B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 44 CS Register"]
pub mod CS44 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 44 ID Register"]
pub mod ID44 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 17 WORD_32B Register"]
pub mod MB17_32B_WORD6 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_27 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_26 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_25 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_24 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 17 WORD_32B Register"]
pub mod MB17_32B_WORD7 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_31 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_30 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_29 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_28 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 45 CS Register"]
pub mod CS45 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 45 ID Register"]
pub mod ID45 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_64B Register"]
pub mod MB10_64B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_64B Register"]
pub mod MB10_64B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 46 CS Register"]
pub mod CS46 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 46 ID Register"]
pub mod ID46 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_64B Register"]
pub mod MB10_64B_WORD4 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_19 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_18 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_17 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_16 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_64B Register"]
pub mod MB10_64B_WORD5 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_23 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_22 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_21 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_20 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 47 CS Register"]
pub mod CS47 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 47 ID Register"]
pub mod ID47 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_64B Register"]
pub mod MB10_64B_WORD8 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_35 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_34 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_33 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_32 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_64B Register"]
pub mod MB10_64B_WORD9 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_39 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_38 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_37 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_36 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 48 CS Register"]
pub mod CS48 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 48 ID Register"]
pub mod ID48 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_64B Register"]
pub mod MB10_64B_WORD12 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_51 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_50 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_49 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_48 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 10 WORD_64B Register"]
pub mod MB10_64B_WORD13 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_55 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_54 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_53 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_52 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 49 CS Register"]
pub mod CS49 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 49 ID Register"]
pub mod ID49 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 CS Register"]
pub mod MB11_64B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 ID Register"]
pub mod MB11_64B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 50 CS Register"]
pub mod CS50 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 50 ID Register"]
pub mod ID50 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_64B Register"]
pub mod MB11_64B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_64B Register"]
pub mod MB11_64B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 51 CS Register"]
pub mod CS51 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 51 ID Register"]
pub mod ID51 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_64B Register"]
pub mod MB11_64B_WORD6 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_27 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_26 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_25 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_24 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_64B Register"]
pub mod MB11_64B_WORD7 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_31 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_30 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_29 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_28 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 52 CS Register"]
pub mod CS52 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 52 ID Register"]
pub mod ID52 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_64B Register"]
pub mod MB11_64B_WORD10 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_43 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_42 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_41 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_40 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_64B Register"]
pub mod MB11_64B_WORD11 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_47 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_46 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_45 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_44 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 53 CS Register"]
pub mod CS53 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 53 ID Register"]
pub mod ID53 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_64B Register"]
pub mod MB11_64B_WORD14 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_59 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_58 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_57 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_56 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 11 WORD_64B Register"]
pub mod MB11_64B_WORD15 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_63 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_62 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_61 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_60 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 54 CS Register"]
pub mod CS54 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 54 ID Register"]
pub mod ID54 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_64B Register"]
pub mod MB12_64B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_64B Register"]
pub mod MB12_64B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 55 CS Register"]
pub mod CS55 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 55 ID Register"]
pub mod ID55 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_64B Register"]
pub mod MB12_64B_WORD4 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_19 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_18 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_17 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_16 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_64B Register"]
pub mod MB12_64B_WORD5 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_23 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_22 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_21 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_20 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 56 CS Register"]
pub mod CS56 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 56 ID Register"]
pub mod ID56 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_64B Register"]
pub mod MB12_64B_WORD8 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_35 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_34 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_33 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_32 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_64B Register"]
pub mod MB12_64B_WORD9 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_39 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_38 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_37 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_36 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 57 CS Register"]
pub mod CS57 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 57 ID Register"]
pub mod ID57 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_64B Register"]
pub mod MB12_64B_WORD12 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_51 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_50 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_49 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_48 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 12 WORD_64B Register"]
pub mod MB12_64B_WORD13 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_55 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_54 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_53 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_52 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 58 CS Register"]
pub mod CS58 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 58 ID Register"]
pub mod ID58 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 CS Register"]
pub mod MB13_64B_CS {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 ID Register"]
pub mod MB13_64B_ID {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 59 CS Register"]
pub mod CS59 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 59 ID Register"]
pub mod ID59 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_64B Register"]
pub mod MB13_64B_WORD2 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_11 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_10 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_9 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_8 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_64B Register"]
pub mod MB13_64B_WORD3 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_15 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_14 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_13 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_12 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 60 CS Register"]
pub mod CS60 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 60 ID Register"]
pub mod ID60 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_64B Register"]
pub mod MB13_64B_WORD6 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_27 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_26 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_25 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_24 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_64B Register"]
pub mod MB13_64B_WORD7 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_31 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_30 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_29 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_28 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 61 CS Register"]
pub mod CS61 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 61 ID Register"]
pub mod ID61 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_64B Register"]
pub mod MB13_64B_WORD10 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_43 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_42 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_41 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_40 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_64B Register"]
pub mod MB13_64B_WORD11 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_47 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_46 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_45 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_44 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 62 CS Register"]
pub mod CS62 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 62 ID Register"]
pub mod ID62 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_64B Register"]
pub mod MB13_64B_WORD14 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_59 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_58 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_57 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_56 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 13 WORD_64B Register"]
pub mod MB13_64B_WORD15 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_63 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_62 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_61 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_60 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 63 CS Register"]
pub mod CS63 {
#[doc = "Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."]
pub mod TIME_STAMP {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Length of the data to be stored/transmitted."]
pub mod DLC {
pub const offset: u32 = 16;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Remote Transmission Request. One/zero for remote/data frame."]
pub mod RTR {
pub const offset: u32 = 20;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "ID Extended. One/zero for extended/standard format frame."]
pub mod IDE {
pub const offset: u32 = 21;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Substitute Remote Request. Contains a fixed recessive bit."]
pub mod SRR {
pub const offset: u32 = 22;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process."]
pub mod CODE {
pub const offset: u32 = 24;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Error State Indicator. This bit indicates if the transmitting node is error active or error passive."]
pub mod ESI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame."]
pub mod BRS {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010."]
pub mod EDL {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 63 ID Register"]
pub mod ID63 {
#[doc = "Contains extended (LOW word) identifier of message buffer."]
pub mod EXT {
pub const offset: u32 = 0;
pub const mask: u32 = 0x0003_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Contains standard/extended (HIGH word) identifier of message buffer."]
pub mod STD {
pub const offset: u32 = 18;
pub const mask: u32 = 0x07ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority."]
pub mod PRIO {
pub const offset: u32 = 29;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 63 WORD_8B Register"]
pub mod MB63_8B_WORD0 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_3 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_2 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_1 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_0 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Message Buffer 63 WORD_8B Register"]
pub mod MB63_8B_WORD1 {
#[doc = "Data byte 0 of Rx/Tx frame."]
pub mod DATA_BYTE_7 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 1 of Rx/Tx frame."]
pub mod DATA_BYTE_6 {
pub const offset: u32 = 8;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 2 of Rx/Tx frame."]
pub mod DATA_BYTE_5 {
pub const offset: u32 = 16;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data byte 3 of Rx/Tx frame."]
pub mod DATA_BYTE_4 {
pub const offset: u32 = 24;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Rx Individual Mask Registers"]
pub mod RXIMR {
#[doc = "Individual Mask Bits"]
pub mod MI {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Enhanced CAN Bit Timing Prescalers"]
pub mod EPRS {
#[doc = "Extended Nominal Prescaler Division Factor"]
pub mod ENPRESDIV {
pub const offset: u32 = 0;
pub const mask: u32 = 0x03ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Extended Data Phase Prescaler Division Factor"]
pub mod EDPRESDIV {
pub const offset: u32 = 16;
pub const mask: u32 = 0x03ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Enhanced Nominal CAN Bit Timing"]
pub mod ENCBT {
#[doc = "Nominal Time Segment 1"]
pub mod NTSEG1 {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Nominal Time Segment 2"]
pub mod NTSEG2 {
pub const offset: u32 = 12;
pub const mask: u32 = 0x7f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Nominal Resynchronization Jump Width"]
pub mod NRJW {
pub const offset: u32 = 22;
pub const mask: u32 = 0x7f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Enhanced Data Phase CAN bit Timing"]
pub mod EDCBT {
#[doc = "Data Phase Segment 1"]
pub mod DTSEG1 {
pub const offset: u32 = 0;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data Phase Time Segment 2"]
pub mod DTSEG2 {
pub const offset: u32 = 12;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Data Phase Resynchronization Jump Width"]
pub mod DRJW {
pub const offset: u32 = 22;
pub const mask: u32 = 0x0f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Enhanced Transceiver Delay Compensation"]
pub mod ETDC {
#[doc = "Enhanced Transceiver Delay Compensation Value"]
pub mod ETDCVAL {
pub const offset: u32 = 0;
pub const mask: u32 = 0xff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Enhanced Transceiver Delay Compensation Offset"]
pub mod ETDCOFF {
pub const offset: u32 = 16;
pub const mask: u32 = 0x7f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Transceiver Delay Measurement Disable"]
pub mod TDMDIS {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "TDC measurement is enabled"]
pub const TDMDIS_0: u32 = 0;
#[doc = "TDC measurement is disabled"]
pub const TDMDIS_1: u32 = 0x01;
}
}
}
#[doc = "CAN FD Control Register"]
pub mod FDCTRL {
#[doc = "Transceiver Delay Compensation Value"]
pub mod TDCVAL {
pub const offset: u32 = 0;
pub const mask: u32 = 0x3f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Transceiver Delay Compensation Offset"]
pub mod TDCOFF {
pub const offset: u32 = 8;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Transceiver Delay Compensation Fail"]
pub mod TDCFAIL {
pub const offset: u32 = 14;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Measured loop delay is in range."]
pub const TDCFAIL_0: u32 = 0;
#[doc = "Measured loop delay is out of range."]
pub const TDCFAIL_1: u32 = 0x01;
}
}
#[doc = "Transceiver Delay Compensation Enable"]
pub mod TDCEN {
pub const offset: u32 = 15;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "TDC is disabled"]
pub const TDCEN_0: u32 = 0;
#[doc = "TDC is enabled"]
pub const TDCEN_1: u32 = 0x01;
}
}
#[doc = "Message Buffer Data Size for Region 0"]
pub mod MBDSR0 {
pub const offset: u32 = 16;
pub const mask: u32 = 0x03 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Selects 8 bytes per Message Buffer."]
pub const MBDSR0_0: u32 = 0;
#[doc = "Selects 16 bytes per Message Buffer."]
pub const MBDSR0_1: u32 = 0x01;
#[doc = "Selects 32 bytes per Message Buffer."]
pub const MBDSR0_2: u32 = 0x02;
#[doc = "Selects 64 bytes per Message Buffer."]
pub const MBDSR0_3: u32 = 0x03;
}
}
#[doc = "Message Buffer Data Size for Region 1"]
pub mod MBDSR1 {
pub const offset: u32 = 19;
pub const mask: u32 = 0x03 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Selects 8 bytes per Message Buffer."]
pub const MBDSR1_0: u32 = 0;
#[doc = "Selects 16 bytes per Message Buffer."]
pub const MBDSR1_1: u32 = 0x01;
#[doc = "Selects 32 bytes per Message Buffer."]
pub const MBDSR1_2: u32 = 0x02;
#[doc = "Selects 64 bytes per Message Buffer."]
pub const MBDSR1_3: u32 = 0x03;
}
}
#[doc = "Bit Rate Switch Enable"]
pub mod FDRATE {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
pub const FDRATE_0: u32 = 0;
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
pub const FDRATE_1: u32 = 0x01;
}
}
}
#[doc = "CAN FD Bit Timing Register"]
pub mod FDCBT {
#[doc = "Fast Phase Segment 2"]
pub mod FPSEG2 {
pub const offset: u32 = 0;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Fast Phase Segment 1"]
pub mod FPSEG1 {
pub const offset: u32 = 5;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Fast Propagation Segment"]
pub mod FPROPSEG {
pub const offset: u32 = 10;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Fast Resync Jump Width"]
pub mod FRJW {
pub const offset: u32 = 16;
pub const mask: u32 = 0x07 << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Fast Prescaler Division Factor"]
pub mod FPRESDIV {
pub const offset: u32 = 20;
pub const mask: u32 = 0x03ff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "CAN FD CRC Register"]
pub mod FDCRC {
#[doc = "Extended Transmitted CRC value"]
pub mod FD_TXCRC {
pub const offset: u32 = 0;
pub const mask: u32 = 0x001f_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "CRC Mailbox Number for FD_TXCRC"]
pub mod FD_MBCRC {
pub const offset: u32 = 24;
pub const mask: u32 = 0x7f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Enhanced Rx FIFO Control Register"]
pub mod ERFCR {
#[doc = "Enhanced Rx FIFO Watermark"]
pub mod ERFWM {
pub const offset: u32 = 0;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Number of Enhanced Rx FIFO Filter Elements"]
pub mod NFE {
pub const offset: u32 = 8;
pub const mask: u32 = 0x3f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Number of Extended ID Filter Elements"]
pub mod NEXIF {
pub const offset: u32 = 16;
pub const mask: u32 = 0x7f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "DMA Last Word"]
pub mod DMALW {
pub const offset: u32 = 26;
pub const mask: u32 = 0x1f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Enhanced Rx FIFO enable"]
pub mod ERFEN {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Enhanced Rx FIFO is disabled"]
pub const ERFEN_0: u32 = 0;
#[doc = "Enhanced Rx FIFO is enabled"]
pub const ERFEN_1: u32 = 0x01;
}
}
}
#[doc = "Enhanced Rx FIFO Interrupt Enable register"]
pub mod ERFIER {
#[doc = "Enhanced Rx FIFO Data Available Interrupt Enable"]
pub mod ERFDAIE {
pub const offset: u32 = 28;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Enhanced Rx FIFO Data Available Interrupt is disabled"]
pub const ERFDAIE_0: u32 = 0;
#[doc = "Enhanced Rx FIFO Data Available Interrupt is enabled"]
pub const ERFDAIE_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO Watermark Indication Interrupt Enable"]
pub mod ERFWMIIE {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Enhanced Rx FIFO Watermark Interrupt is disabled"]
pub const ERFWMIIE_0: u32 = 0;
#[doc = "Enhanced Rx FIFO Watermark Interrupt is enabled"]
pub const ERFWMIIE_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO Overflow Interrupt Enable"]
pub mod ERFOVFIE {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Enhanced Rx FIFO Overflow is disabled"]
pub const ERFOVFIE_0: u32 = 0;
#[doc = "Enhanced Rx FIFO Overflow is enabled"]
pub const ERFOVFIE_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO Underflow Interrupt Enable"]
pub mod ERFUFWIE {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Enhanced Rx FIFO Underflow interrupt is disabled"]
pub const ERFUFWIE_0: u32 = 0;
#[doc = "Enhanced Rx FIFO Underflow interrupt is enabled"]
pub const ERFUFWIE_1: u32 = 0x01;
}
}
}
#[doc = "Enhanced Rx FIFO Status Register"]
pub mod ERFSR {
#[doc = "Enhanced Rx FIFO Elements"]
pub mod ERFEL {
pub const offset: u32 = 0;
pub const mask: u32 = 0x3f << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
#[doc = "Enhanced Rx FIFO full"]
pub mod ERFF {
pub const offset: u32 = 16;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Enhanced Rx FIFO is not full"]
pub const ERFF_0: u32 = 0;
#[doc = "Enhanced Rx FIFO is full"]
pub const ERFF_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO empty"]
pub mod ERFE {
pub const offset: u32 = 17;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Enhanced Rx FIFO is not empty"]
pub const ERFE_0: u32 = 0;
#[doc = "Enhanced Rx FIFO is empty"]
pub const ERFE_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO Clear"]
pub mod ERFCLR {
pub const offset: u32 = 27;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No effect"]
pub const ERFCLR_0: u32 = 0;
#[doc = "Clear Enhanced Rx FIFO content"]
pub const ERFCLR_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO Data Available"]
pub mod ERFDA {
pub const offset: u32 = 28;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence"]
pub const ERFDA_0: u32 = 0;
#[doc = "There is at least one message stored in Enhanced Rx FIFO"]
pub const ERFDA_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO Watermark Indication"]
pub mod ERFWMI {
pub const offset: u32 = 29;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence"]
pub const ERFWMI_0: u32 = 0;
#[doc = "The number of messages in FIFO is greater than the watermark"]
pub const ERFWMI_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO Overflow"]
pub mod ERFOVF {
pub const offset: u32 = 30;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence"]
pub const ERFOVF_0: u32 = 0;
#[doc = "Enhanced Rx FIFO overflow"]
pub const ERFOVF_1: u32 = 0x01;
}
}
#[doc = "Enhanced Rx FIFO Underflow"]
pub mod ERFUFW {
pub const offset: u32 = 31;
pub const mask: u32 = 0x01 << offset;
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "No such occurrence"]
pub const ERFUFW_0: u32 = 0;
#[doc = "Enhanced Rx FIFO underflow"]
pub const ERFUFW_1: u32 = 0x01;
}
}
}
#[doc = "High Resolution Time Stamp"]
pub mod HR_TIME_STAMP {
#[doc = "High Resolution Time Stamp"]
pub mod TS {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}
#[doc = "Enhanced Rx FIFO Filter Element"]
pub mod ERFFEL {
#[doc = "Filter Element Bits"]
pub mod FEL {
pub const offset: u32 = 0;
pub const mask: u32 = 0xffff_ffff << offset;
pub mod R {}
pub mod W {}
pub mod RW {}
}
}