Expand description
Control 2 Register
Modulesยง
- This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process
- If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO
- This 4-bit field defines the number of Rx FIFO filters according to
- If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame
- This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus
- Enable unrestricted write access to FlexCAN memory in Freeze mode