Module imxrt_ral::ccm::CLPCR

source ·
Expand description

CCM Low Power Control Register

Modules§

  • Define if ARM clocks (arm_clk, soc_mxclk, soc_pclk, soc_dbg_pclk, vl_wrck) will be disabled on wait mode
  • Bypass low power mode handshake. This bit should always be set to 1’b1 by software.
  • Bypass low power mode handshake. This bit should always be set to 1’b1 by software.
  • In run mode, software can manually control powering down of on chip oscillator, i
  • dis_ref_osc - in run mode, software can manually control closing of external reference oscillator clock, i
  • Setting the low power mode that system will enter on next assertion of dsm_request signal.
  • Mask WFI of core0 for entering low power mode Assertion of all bits[27:22] will generate low power mode request
  • Mask L2CC IDLE for entering low power mode
  • Mask SCU IDLE for entering low power mode Assertion of all bits[27:22] will generate low power mode request
  • Standby clock oscillator bit
  • Standby counter definition
  • Voltage standby request bit