Module CSCDR1

CCM Serial Clock Divider Register 1

Modules

• TRACE_PODF
  Divider for trace clock. Divider should be updated when output clock is gated.
• UART_CLK_PODF
  Divider for uart clock podf.
• UART_CLK_SEL
  Selector for the UART clock multiplexor
• USDHC1_PODF
  Divider for usdhc1 clock podf. Divider should be updated when output clock is gated.
• USDHC2_PODF
  Divider for usdhc2 clock. Divider should be updated when output clock is gated.