Expand description
CCM Serial Clock Divider Register 2
Modulesยง
- LCDIF_
PRED - Pre-divider for lcdif clock. Divider should be updated when output clock is gated.
- LCDIF_
PRE_ CLK_ SEL - Selector for lcdif root clock pre-multiplexer
- LPI2C_
CLK_ PODF - Divider for lpi2c clock podf. Divider should be updated when output clock is gated. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this.
- LPI2C_
CLK_ SEL - Selector for the LPI2C clock multiplexor