Module CSISR

CSI Status Register

Modules

• BASEADDR_CHHANGE_ERROR
  When using base address switching enable, this bit will be 1 when switching occur before DMA complete
• COF_INT
  Change Of Field Interrupt Status
• DMA_FIELD0_DONE
  When DMA field 0 is complete, this bit will be set to 1(clear by writing 1).
• DMA_FIELD1_DONE
  When DMA field 0 is complete, this bit will be set to 1(clear by writing 1).
• DMA_TSF_DONE_FB1
  DMA Transfer Done in Frame Buffer1
• DMA_TSF_DONE_FB2
  DMA Transfer Done in Frame Buffer2
• DMA_TSF_DONE_SFF
  DMA Transfer Done from StatFIFO
• DRDY
  RXFIFO Data Ready
• ECC_INT
  CCIR Error Interrupt
• EOF_INT
  End of Frame (EOF) Interrupt Status. Indicates when EOF is detected. (Cleared by writing 1)
• F1_INT
  CCIR Field 1 Interrupt Status
• F2_INT
  CCIR Field 2 Interrupt Status
• HRESP_ERR_INT
  Hresponse Error Interrupt Status
• RF_OR_INT
  RxFIFO Overrun Interrupt Status
• RXFF_INT
  RXFIFO Full Interrupt Status
• SF_OR_INT
  STATFIFO Overrun Interrupt Status
• SOF_INT
  Start of Frame Interrupt Status. Indicates when SOF is detected. (Cleared by writing 1)
• STATFF_INT
  STATFIFO Full Interrupt Status