imxrt_ral::flexspi

Module STS2

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Status Register 2

Modulesยง

  • Flash A sample clock reference delay line locked.
  • Flash A sample clock reference delay line delay cell number selection.
  • Flash A sample clock slave delay line locked.
  • Flash A sample clock slave delay line delay cell number selection .
  • Flash B sample clock reference delay line locked.
  • Flash B sample clock reference delay line delay cell number selection.
  • Flash B sample clock slave delay line locked.
  • Flash B sample clock slave delay line delay cell number selection.