Expand description
GPR1 General Purpose Register
Modules§
- ARM CM7 platform AHB clock enable
- ENET1 reference clock mode select.
- ENET1_TX_CLK data direction control
- ENET2 reference clock mode select.
- ENET2_TX_CLK data direction control
- ENET and ENET2 ipg_clk_s clock gating enable
- Exclusive monitor response select of illegal command
- Global interrupt “0” bit (connected to ARM M7 IRQ#0 and GPC)
- SAI1 MCLK1 source select
- SAI1 MCLK2 source select
- SAI1 MCLK3 source select
- sai1.MCLK signal direction control
- SAI2 MCLK3 source select
- sai2.MCLK signal direction control
- SAI3 MCLK3 source select
- sai3.MCLK signal direction control
- USB Exposure mode