Module CTRL_CLR

LCDIF General Control Register

Modules

• BYPASS_COUNT
  When this bit is 0, it means that LCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out
• CLKGATE
  This bit must be set to zero for normal operation
• CSC_DATA_SWIZZLE
  This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus
• DATA_FORMAT_16_BIT
  When this bit is 1 and WORD_LENGTH = 0, it implies that the 16-bit data is in ARGB555 format
• DATA_FORMAT_18_BIT
  Used only when WORD_LENGTH = 2, i.e. 18-bit.
• DATA_FORMAT_24_BIT
  Used only when WORD_LENGTH = 3, i
• DATA_SHIFT_DIR
  Use this bit to determine the direction of shift of transmit data.
• DOTCLK_MODE
  Set this bit to 1 to make the hardware go into the DOTCLK mode, i
• ENABLE_PXP_HANDSHAKE
  If this bit is set and LCDIF_MASTER bit is set, the LCDIF will act as bus master and the handshake mechanism between LCDIF and PXP will be turned on
• INPUT_DATA_SWIZZLE
  This field specifies how to swap the bytes fetched by the bus master interface
• LCD_DATABUS_WIDTH
  LCD Data bus transfer width.
• MASTER
  Set this bit to make the LCDIF act as a bus master
• RUN
  When this bit is set by software, the LCDIF will begin transferring data between the SoC and the display
• SFTRST
  This bit must be set to zero to enable normal operation of the LCDIF
• SHIFT_NUM_BITS
  The data to be transmitted is shifted left or right by this number of bits.
• WORD_LENGTH
  Input data format.