Module imxrt_ral::lcdif::VDCTRL2

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LCDIF VSYNC Mode and Dotclk Mode Control Register2

Modules§

  • HSYNC_PERIOD
    Total number of DISPLAY CLOCK (pix_clk) cycles between two positive or two negative edges of the HSYNC signal
  • HSYNC_PULSE_WIDTH
    Number of DISPLAY CLOCK (pix_clk) cycles for which HSYNC signal is active.