Module VDCTRL2

Source
Expand description

LCDIF VSYNC Mode and Dotclk Mode Control Register2

Modulesยง

HSYNC_PERIOD
Total number of DISPLAY CLOCK (pix_clk) cycles between two positive or two negative edges of the HSYNC signal
HSYNC_PULSE_WIDTH
Number of DISPLAY CLOCK (pix_clk) cycles for which HSYNC signal is active.