Module MISC1_CLR

Miscellaneous Register 1

Modules

• IRQ_ANA_BO
  This status bit is set to one when when any of the analog regulator brownout interrupts assert
• IRQ_DIG_BO
  This status bit is set to one when when any of the digital regulator brownout interrupts assert
• IRQ_TEMPHIGH
  This status bit is set to one when the temperature sensor high interrupt asserts for high temperature
• IRQ_TEMPLOW
  This status bit is set to one when the temperature sensor low interrupt asserts for low temperature
• IRQ_TEMPPANIC
  This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature
• LVDS1_CLK_SEL
  This field selects the clk to be routed to anaclk1/1b.Not related to PMU.
• LVDS2_CLK_SEL
  This field selects the clk to be routed to anaclk2/2b.Not related to PMU.
• LVDSCLK1_IBEN
  This enables the LVDS input buffer for anaclk1/1b
• LVDSCLK1_OBEN
  This enables the LVDS output buffer for anaclk1/1b
• LVDSCLK2_IBEN
  This enables the LVDS input buffer for anaclk2/2b
• LVDSCLK2_OBEN
  This enables the LVDS output buffer for anaclk2/2b
• PFD_480_AUTOGATE_EN
  This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off
• PFD_528_AUTOGATE_EN
  This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off