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Miscellaneous Control Register
Modules§
- AUDIO_
DIV_ LSB - LSB of Post-divider for Audio PLL
- AUDIO_
DIV_ MSB - MSB of Post-divider for Audio PLL
- PLL3_
DISABLE - Default value of “0”
- REG0_
BO_ OFFSET - This field defines the brown out voltage offset for the CORE power domain
- REG0_
BO_ STATUS - Reg0 brownout status bit.
- REG0_
ENABLE_ BO - Enables the brownout detection.
- REG0_
STEP_ TIME - Number of clock periods (24MHz clock).
- REG1_
BO_ OFFSET - This field defines the brown out voltage offset for the xPU power domain
- REG1_
BO_ STATUS - Reg1 brownout status bit.
- REG1_
ENABLE_ BO - Enables the brownout detection.
- REG1_
STEP_ TIME - Number of clock periods (24MHz clock).
- REG2_
BO_ OFFSET - This field defines the brown out voltage offset for the xPU power domain
- REG2_
BO_ STATUS - Reg2 brownout status bit.
- REG2_
ENABLE_ BO - Enables the brownout detection.
- REG2_OK
- Signals that the voltage is above the brownout level for the SOC supply
- REG2_
STEP_ TIME - Number of clock periods (24MHz clock).
- VIDEO_
DIV - Post-divider for video