imxrt_ral::pwm::FCTRL0::FSAFE::RW

Constant FSAFE_1

source
pub const FSAFE_1: u16 = 0x01;
Expand description

Safe mode. PWM outputs disabled by this fault are not enabled until FSTS[FFLAGx] is clear and FSTS[FFPINx] is clear at the start of a half cycle or full cycle depending on the states of FSTS[FHALF] and FSTS[FFULL]. If neither FHLAF nor FFULL is set, then the fault condition cannot be cleared.