Expand description
Present State
Modulesยง
- BREN
- Buffer Read Enable
- BWEN
- Buffer Write Enable
- CDIHB
- Command Inhibit (DATA)
- CDPL
- Card Detect Pin Level
- CIHB
- Command Inhibit (CMD)
- CINST
- Card Inserted
- CLSL
- CMD Line Signal Level
- DLA
- Data Line Active
- DLSL
- DATA[7:0] Line Signal Level
- HCKOFF
- HCLK Gated Off Internally
- IPGOFF
- IPG_CLK Gated Off Internally
- PEROFF
- IPG_PERCLK Gated Off Internally
- RTA
- Read Transfer Active
- RTR
- Re-Tuning Request (only for SD3.0 SDR104 mode and EMMC HS200 mode)
- SDOFF
- SD Clock Gated Off Internally
- SDSTB
- SD Clock Stable
- TSCD
- Tape Select Change Done
- WPSPL
- Write Protect Switch Pin Level
- WTA
- Write Transfer Active