RegisterBlock

imxrt_ral::can

Struct RegisterBlock 

Source 
#[repr(C)]
pub struct RegisterBlock {
Show 21 fields
    pub MCR: RWRegister<u32>,
    pub CTRL1: RWRegister<u32>,
    pub TIMER: RWRegister<u32>,
    pub RXMGMASK: RWRegister<u32>,
    pub RX14MASK: RWRegister<u32>,
    pub RX15MASK: RWRegister<u32>,
    pub ECR: RWRegister<u32>,
    pub ESR1: RWRegister<u32>,
    pub IMASK2: RWRegister<u32>,
    pub IMASK1: RWRegister<u32>,
    pub IFLAG2: RWRegister<u32>,
    pub IFLAG1: RWRegister<u32>,
    pub CTRL2: RWRegister<u32>,
    pub ESR2: RORegister<u32>,
    pub CRCR: RORegister<u32>,
    pub RXFGMASK: RWRegister<u32>,
    pub RXFIR: RORegister<u32>,
    pub DBG1: RORegister<u32>,
    pub DBG2: RORegister<u32>,
    pub RXIMR: [RWRegister<u32>; 64],
    pub GFWR: RWRegister<u32>,
    /* private fields */

}
Expand description

FLEXCAN

Fields§

§MCR: RWRegister<u32>

Module Configuration Register

§CTRL1: RWRegister<u32>

Control 1 Register

§TIMER: RWRegister<u32>

Free Running Timer Register

§RXMGMASK: RWRegister<u32>

Rx Mailboxes Global Mask Register

§RX14MASK: RWRegister<u32>

Rx Buffer 14 Mask Register

§RX15MASK: RWRegister<u32>

Rx Buffer 15 Mask Register

§ECR: RWRegister<u32>

Error Counter Register

§ESR1: RWRegister<u32>

Error and Status 1 Register

§IMASK2: RWRegister<u32>

Interrupt Masks 2 Register

§IMASK1: RWRegister<u32>

Interrupt Masks 1 Register

§IFLAG2: RWRegister<u32>

Interrupt Flags 2 Register

§IFLAG1: RWRegister<u32>

Interrupt Flags 1 Register

§CTRL2: RWRegister<u32>

Control 2 Register

§ESR2: RORegister<u32>

Error and Status 2 Register

§CRCR: RORegister<u32>

CRC Register

§RXFGMASK: RWRegister<u32>

Rx FIFO Global Mask Register

§RXFIR: RORegister<u32>

Rx FIFO Information Register

§DBG1: RORegister<u32>

Debug 1 register

§DBG2: RORegister<u32>

Debug 2 register

§RXIMR: [RWRegister<u32>; 64]

Rx Individual Mask Registers

§GFWR: RWRegister<u32>

Glitch Filter Width Registers

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