SPDIF0_CLK_SEL_1

imxrt_ral::ccm::CDCDR::SPDIF0_CLK_SEL::RW

Constant SPDIF0_CLK_SEL_1 

Source 
pub const SPDIF0_CLK_SEL_1: u32 = 0x01;
Expand description

derive clock from PLL3 PFD2