Module CMEOR

CCM Module Enable Overide Register

Modules

• MOD_EN_OV_CAN1_CPI
  Overide clock enable signal from CAN1 - clock will not be gated based on CAN’s signal ‘enable_clk_cpi’
• MOD_EN_OV_CAN2_CPI
  Overide clock enable signal from CAN2 - clock will not be gated based on CAN’s signal ‘enable_clk_cpi’
• MOD_EN_OV_CANFD_CPI
  Overide clock enable signal from FlexCAN3(CANFD) - clock will not be gated based on CAN’s signal ‘enable_clk_cpi’
• MOD_EN_OV_GPT
  Overide clock enable signal from GPT - clock will not be gated based on GPT’s signal ‘ipg_enable_clk’
• MOD_EN_OV_PIT
  Overide clock enable signal from PIT - clock will not be gated based on PIT’s signal ‘ipg_enable_clk’
• MOD_EN_OV_TRNG
  Overide clock enable signal from TRNG
• MOD_EN_USDHC
  overide clock enable signal from USDHC.