Expand description
CCM Module Enable Overide Register
Modules§
- Overide clock enable signal from CAN1 - clock will not be gated based on CAN’s signal ‘enable_clk_cpi’
- Overide clock enable signal from CAN2 - clock will not be gated based on CAN’s signal ‘enable_clk_cpi’
- Overide clock enable signal from FlexCAN3(CANFD) - clock will not be gated based on CAN’s signal ‘enable_clk_cpi’
- Overide clock enable signal from GPT - clock will not be gated based on GPT’s signal ‘ipg_enable_clk’
- Overide clock enable signal from PIT - clock will not be gated based on PIT’s signal ‘ipg_enable_clk’
- Overide clock enable signal from TRNG
- overide clock enable signal from USDHC.