imxrt_ral::iomuxc_gpr::GPR1::ENET1_CLK_SEL::RW

Constant ENET1_CLK_SEL_1

source 
pub const ENET1_CLK_SEL_1: u32 = 0x01;
Expand description

Gets ENET1 TX reference clock from the ENET1_TX_CLK pin. In this use case, an external OSC provides the clock for both the external PHY and the internal controller.