imxrt_ral::iomuxc_gpr::GPR1::ENET2_CLK_SEL::RW

Constant ENET2_CLK_SEL_1

source 
pub const ENET2_CLK_SEL_1: u32 = 0x01;
Expand description

Gets ENET2 TX reference clock from the ENET2_TX_CLK pin. In this use case, an external OSC provides the clock for both the external PHY and the internal controller.