Struct imxrt_ral::semc::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 56 fields
    pub MCR: RWRegister<u32>,
    pub IOCR: RWRegister<u32>,
    pub BMCR0: RWRegister<u32>,
    pub BMCR1: RWRegister<u32>,
    pub BR0: RWRegister<u32>,
    pub BR1: RWRegister<u32>,
    pub BR2: RWRegister<u32>,
    pub BR3: RWRegister<u32>,
    pub BR4: RWRegister<u32>,
    pub BR5: RWRegister<u32>,
    pub BR6: RWRegister<u32>,
    pub BR7: RWRegister<u32>,
    pub BR8: RWRegister<u32>,
    pub DLLCR: RWRegister<u32>,
    pub INTEN: RWRegister<u32>,
    pub INTR: RWRegister<u32>,
    pub SDRAMCR0: RWRegister<u32>,
    pub SDRAMCR1: RWRegister<u32>,
    pub SDRAMCR2: RWRegister<u32>,
    pub SDRAMCR3: RWRegister<u32>,
    pub NANDCR0: RWRegister<u32>,
    pub NANDCR1: RWRegister<u32>,
    pub NANDCR2: RWRegister<u32>,
    pub NANDCR3: RWRegister<u32>,
    pub NORCR0: RWRegister<u32>,
    pub NORCR1: RWRegister<u32>,
    pub NORCR2: RWRegister<u32>,
    pub NORCR3: RWRegister<u32>,
    pub SRAMCR0: RWRegister<u32>,
    pub SRAMCR1: RWRegister<u32>,
    pub SRAMCR2: RWRegister<u32>,
    pub SRAMCR3: RWRegister<u32>,
    pub DBICR0: RWRegister<u32>,
    pub DBICR1: RWRegister<u32>,
    pub IPCR0: RWRegister<u32>,
    pub IPCR1: RWRegister<u32>,
    pub IPCR2: RWRegister<u32>,
    pub IPCMD: RWRegister<u32>,
    pub IPTXDAT: RWRegister<u32>,
    pub IPRXDAT: RORegister<u32>,
    pub STS0: RORegister<u32>,
    pub STS1: RORegister<u32>,
    pub STS2: RORegister<u32>,
    pub STS3: RORegister<u32>,
    pub STS4: RORegister<u32>,
    pub STS5: RORegister<u32>,
    pub STS6: RORegister<u32>,
    pub STS7: RORegister<u32>,
    pub STS8: RORegister<u32>,
    pub STS9: RORegister<u32>,
    pub STS10: RORegister<u32>,
    pub STS11: RORegister<u32>,
    pub STS12: RORegister<u32>,
    pub STS13: RORegister<u32>,
    pub STS14: RORegister<u32>,
    pub STS15: RORegister<u32>,
    /* private fields */

}
Expand description

SEMC

Fields§

§MCR: RWRegister<u32>

Module Control Register

§IOCR: RWRegister<u32>

IO Mux Control Register

§BMCR0: RWRegister<u32>

Master Bus (AXI) Control Register 0

§BMCR1: RWRegister<u32>

Master Bus (AXI) Control Register 1

§BR0: RWRegister<u32>

Base Register 0 (For SDRAM CS0 device)

§BR1: RWRegister<u32>

Base Register 1 (For SDRAM CS1 device)

§BR2: RWRegister<u32>

Base Register 2 (For SDRAM CS2 device)

§BR3: RWRegister<u32>

Base Register 3 (For SDRAM CS3 device)

§BR4: RWRegister<u32>

Base Register 4 (For NAND device)

§BR5: RWRegister<u32>

Base Register 5 (For NOR device)

§BR6: RWRegister<u32>

Base Register 6 (For PSRAM device)

§BR7: RWRegister<u32>

Base Register 7 (For DBI-B (MIPI Display Bus Interface Type B) device)

§BR8: RWRegister<u32>

Base Register 8 (For NAND device)

§DLLCR: RWRegister<u32>

DLL Control Register

§INTEN: RWRegister<u32>

Interrupt Enable Register

§INTR: RWRegister<u32>

Interrupt Enable Register

§SDRAMCR0: RWRegister<u32>

SDRAM control register 0

§SDRAMCR1: RWRegister<u32>

SDRAM control register 1

§SDRAMCR2: RWRegister<u32>

SDRAM control register 2

§SDRAMCR3: RWRegister<u32>

SDRAM control register 3

§NANDCR0: RWRegister<u32>

NAND control register 0

§NANDCR1: RWRegister<u32>

NAND control register 1

§NANDCR2: RWRegister<u32>

NAND control register 2

§NANDCR3: RWRegister<u32>

NAND control register 3

§NORCR0: RWRegister<u32>

NOR control register 0

§NORCR1: RWRegister<u32>

NOR control register 1

§NORCR2: RWRegister<u32>

NOR control register 2

§NORCR3: RWRegister<u32>

NOR control register 3

§SRAMCR0: RWRegister<u32>

SRAM control register 0

§SRAMCR1: RWRegister<u32>

SRAM control register 1

§SRAMCR2: RWRegister<u32>

SRAM control register 2

§SRAMCR3: RWRegister<u32>

SRAM control register 3

§DBICR0: RWRegister<u32>

DBI-B control register 0

§DBICR1: RWRegister<u32>

DBI-B control register 1

§IPCR0: RWRegister<u32>

IP Command control register 0

§IPCR1: RWRegister<u32>

IP Command control register 1

§IPCR2: RWRegister<u32>

IP Command control register 2

§IPCMD: RWRegister<u32>

IP Command register

§IPTXDAT: RWRegister<u32>

TX DATA register (for IP Command)

§IPRXDAT: RORegister<u32>

RX DATA register (for IP Command)

§STS0: RORegister<u32>

Status register 0

§STS1: RORegister<u32>

Status register 1

§STS2: RORegister<u32>

Status register 2

§STS3: RORegister<u32>

Status register 3

§STS4: RORegister<u32>

Status register 4

§STS5: RORegister<u32>

Status register 5

§STS6: RORegister<u32>

Status register 6

§STS7: RORegister<u32>

Status register 7

§STS8: RORegister<u32>

Status register 8

§STS9: RORegister<u32>

Status register 9

§STS10: RORegister<u32>

Status register 10

§STS11: RORegister<u32>

Status register 11

§STS12: RORegister<u32>

Status register 12

§STS13: RORegister<u32>

Status register 13

§STS14: RORegister<u32>

Status register 14

§STS15: RORegister<u32>

Status register 15

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