Struct imxrt_ral::tmr::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 53 fields
    pub COMP10: RWRegister<u16>,
    pub COMP20: RWRegister<u16>,
    pub CAPT0: RWRegister<u16>,
    pub LOAD0: RWRegister<u16>,
    pub HOLD0: RWRegister<u16>,
    pub CNTR0: RWRegister<u16>,
    pub CTRL0: RWRegister<u16>,
    pub SCTRL0: RWRegister<u16>,
    pub CMPLD10: RWRegister<u16>,
    pub CMPLD20: RWRegister<u16>,
    pub CSCTRL0: RWRegister<u16>,
    pub FILT0: RWRegister<u16>,
    pub DMA0: RWRegister<u16>,
    pub ENBL: RWRegister<u16>,
    pub COMP11: RWRegister<u16>,
    pub COMP21: RWRegister<u16>,
    pub CAPT1: RWRegister<u16>,
    pub LOAD1: RWRegister<u16>,
    pub HOLD1: RWRegister<u16>,
    pub CNTR1: RWRegister<u16>,
    pub CTRL1: RWRegister<u16>,
    pub SCTRL1: RWRegister<u16>,
    pub CMPLD11: RWRegister<u16>,
    pub CMPLD21: RWRegister<u16>,
    pub CSCTRL1: RWRegister<u16>,
    pub FILT1: RWRegister<u16>,
    pub DMA1: RWRegister<u16>,
    pub COMP12: RWRegister<u16>,
    pub COMP22: RWRegister<u16>,
    pub CAPT2: RWRegister<u16>,
    pub LOAD2: RWRegister<u16>,
    pub HOLD2: RWRegister<u16>,
    pub CNTR2: RWRegister<u16>,
    pub CTRL2: RWRegister<u16>,
    pub SCTRL2: RWRegister<u16>,
    pub CMPLD12: RWRegister<u16>,
    pub CMPLD22: RWRegister<u16>,
    pub CSCTRL2: RWRegister<u16>,
    pub FILT2: RWRegister<u16>,
    pub DMA2: RWRegister<u16>,
    pub COMP13: RWRegister<u16>,
    pub COMP23: RWRegister<u16>,
    pub CAPT3: RWRegister<u16>,
    pub LOAD3: RWRegister<u16>,
    pub HOLD3: RWRegister<u16>,
    pub CNTR3: RWRegister<u16>,
    pub CTRL3: RWRegister<u16>,
    pub SCTRL3: RWRegister<u16>,
    pub CMPLD13: RWRegister<u16>,
    pub CMPLD23: RWRegister<u16>,
    pub CSCTRL3: RWRegister<u16>,
    pub FILT3: RWRegister<u16>,
    pub DMA3: RWRegister<u16>,
    /* private fields */

}
Expand description

Quad Timer

Fields§

§COMP10: RWRegister<u16>

Timer Channel Compare Register 1

§COMP20: RWRegister<u16>

Timer Channel Compare Register 2

§CAPT0: RWRegister<u16>

Timer Channel Capture Register

§LOAD0: RWRegister<u16>

Timer Channel Load Register

§HOLD0: RWRegister<u16>

Timer Channel Hold Register

§CNTR0: RWRegister<u16>

Timer Channel Counter Register

§CTRL0: RWRegister<u16>

Timer Channel Control Register

§SCTRL0: RWRegister<u16>

Timer Channel Status and Control Register

§CMPLD10: RWRegister<u16>

Timer Channel Comparator Load Register 1

§CMPLD20: RWRegister<u16>

Timer Channel Comparator Load Register 2

§CSCTRL0: RWRegister<u16>

Timer Channel Comparator Status and Control Register

§FILT0: RWRegister<u16>

Timer Channel Input Filter Register

§DMA0: RWRegister<u16>

Timer Channel DMA Enable Register

§ENBL: RWRegister<u16>

Timer Channel Enable Register

§COMP11: RWRegister<u16>

Timer Channel Compare Register 1

§COMP21: RWRegister<u16>

Timer Channel Compare Register 2

§CAPT1: RWRegister<u16>

Timer Channel Capture Register

§LOAD1: RWRegister<u16>

Timer Channel Load Register

§HOLD1: RWRegister<u16>

Timer Channel Hold Register

§CNTR1: RWRegister<u16>

Timer Channel Counter Register

§CTRL1: RWRegister<u16>

Timer Channel Control Register

§SCTRL1: RWRegister<u16>

Timer Channel Status and Control Register

§CMPLD11: RWRegister<u16>

Timer Channel Comparator Load Register 1

§CMPLD21: RWRegister<u16>

Timer Channel Comparator Load Register 2

§CSCTRL1: RWRegister<u16>

Timer Channel Comparator Status and Control Register

§FILT1: RWRegister<u16>

Timer Channel Input Filter Register

§DMA1: RWRegister<u16>

Timer Channel DMA Enable Register

§COMP12: RWRegister<u16>

Timer Channel Compare Register 1

§COMP22: RWRegister<u16>

Timer Channel Compare Register 2

§CAPT2: RWRegister<u16>

Timer Channel Capture Register

§LOAD2: RWRegister<u16>

Timer Channel Load Register

§HOLD2: RWRegister<u16>

Timer Channel Hold Register

§CNTR2: RWRegister<u16>

Timer Channel Counter Register

§CTRL2: RWRegister<u16>

Timer Channel Control Register

§SCTRL2: RWRegister<u16>

Timer Channel Status and Control Register

§CMPLD12: RWRegister<u16>

Timer Channel Comparator Load Register 1

§CMPLD22: RWRegister<u16>

Timer Channel Comparator Load Register 2

§CSCTRL2: RWRegister<u16>

Timer Channel Comparator Status and Control Register

§FILT2: RWRegister<u16>

Timer Channel Input Filter Register

§DMA2: RWRegister<u16>

Timer Channel DMA Enable Register

§COMP13: RWRegister<u16>

Timer Channel Compare Register 1

§COMP23: RWRegister<u16>

Timer Channel Compare Register 2

§CAPT3: RWRegister<u16>

Timer Channel Capture Register

§LOAD3: RWRegister<u16>

Timer Channel Load Register

§HOLD3: RWRegister<u16>

Timer Channel Hold Register

§CNTR3: RWRegister<u16>

Timer Channel Counter Register

§CTRL3: RWRegister<u16>

Timer Channel Control Register

§SCTRL3: RWRegister<u16>

Timer Channel Status and Control Register

§CMPLD13: RWRegister<u16>

Timer Channel Comparator Load Register 1

§CMPLD23: RWRegister<u16>

Timer Channel Comparator Load Register 2

§CSCTRL3: RWRegister<u16>

Timer Channel Comparator Status and Control Register

§FILT3: RWRegister<u16>

Timer Channel Input Filter Register

§DMA3: RWRegister<u16>

Timer Channel DMA Enable Register

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